Using PLAs to design universal logic modules in FPGAs

K. K. Lee, D. F. Wong

Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

1 Citation (Scopus)

Abstract

We consider implementing Universal Logic Modules in Field Programmable Gate Arrays (FPGAs) with Programmable Logic Arrays (PLAs) using a reduced number of programmable switches. These have the advantages of a regular structure and are very easy to program. By suitably reducing the number of switches in a PLA, the total number of switches is reduced tremendously, while the PLA still remains functionally complete. Since switch features take up more space than other logic elements, the savings can translate to a reduction in area. The reduction in programmable switches implies that a smaller number of programming bits is required for each ULM. We obtained 3-input and 4-input ULMs using 5 and 13 programmable switches respectively, matching previous results but in a smaller area. Technology mapping is also very simple. We also obtain approximate ULMs with very high coverage. We obtained an approximate ULM using 11 programming switches which covers 99% of all 4-input functions, using a much smaller area than [1].

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems, ISCAS 1998
PublisherIEEE
Pages421-425
Number of pages5
Volume6
ISBN (Print)0780344553
DOIs
Publication statusPublished - May 1998
Event1998 IEEE International Symposium on Circuits and Systems, ISCAS 1998 - Monterey, United States
Duration: 31 May 19983 Jun 1998
https://ieeexplore.ieee.org/xpl/conhome/5627/proceeding

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
PublisherIEEE
ISSN (Print)0271-4310

Conference

Conference1998 IEEE International Symposium on Circuits and Systems, ISCAS 1998
Country/TerritoryUnited States
CityMonterey
Period31/05/983/06/98
Internet address

Scopus Subject Areas

  • Electrical and Electronic Engineering

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