TY - GEN
T1 - UI-route: An ultra-fast incremental maze routing algorithm
AU - Huang, Tsung Wei
AU - Wu, Pei Ci
AU - Wong, Martin D.
N1 - Funding Information:
© IEEE 2014
PY - 2014/6
Y1 - 2014/6
N2 - Grid-based maze routing is a fundamental problem in electronic-design-automation (EDA) domain. A core primitive deals with a large query set about route connectivity subject to incremental changes on grid graph. Existing approaches pertain to batch processing, where each route query is independently and repeatedly solved by a routing procedure. Few researches so far discuss an efficient utilization of search knowledge in incremental fashion, which could dramatically speed up the search. Unfortunately, existing algorithms nearly rely on irregular and highly divergent search space, imposing acceleration challenges on refitting them to incremental version. Consequently, in this paper we present UI-Route, an ultra-fast incremental maze routing algorithm in grid environment. UI-Route is unique in breaking route equivalence, proving that a huge amount of equivalent search efforts can be optimally and incrementally eliminated. Equivalence breaking enables regularized search space, delivering well-tabulated search knowledge through the incremental processing. Moreover UI-Route is largely orthogonal to many applications built upon maze routing and therefore can seamlessly substitute for speedup. Experimental results on a set of modern circuit benchmarks demonstrate that UI-Route achieves prominent speedup over existing algorithms.
AB - Grid-based maze routing is a fundamental problem in electronic-design-automation (EDA) domain. A core primitive deals with a large query set about route connectivity subject to incremental changes on grid graph. Existing approaches pertain to batch processing, where each route query is independently and repeatedly solved by a routing procedure. Few researches so far discuss an efficient utilization of search knowledge in incremental fashion, which could dramatically speed up the search. Unfortunately, existing algorithms nearly rely on irregular and highly divergent search space, imposing acceleration challenges on refitting them to incremental version. Consequently, in this paper we present UI-Route, an ultra-fast incremental maze routing algorithm in grid environment. UI-Route is unique in breaking route equivalence, proving that a huge amount of equivalent search efforts can be optimally and incrementally eliminated. Equivalence breaking enables regularized search space, delivering well-tabulated search knowledge through the incremental processing. Moreover UI-Route is largely orthogonal to many applications built upon maze routing and therefore can seamlessly substitute for speedup. Experimental results on a set of modern circuit benchmarks demonstrate that UI-Route achieves prominent speedup over existing algorithms.
UR - https://www.scopus.com/record/display.uri?eid=2-s2.0-84907346342&origin=inward
U2 - 10.1145/2633948.2633952
DO - 10.1145/2633948.2633952
M3 - Conference proceeding
T3 - Proceedings of ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)
SP - 1
EP - 8
BT - 2014 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)
PB - IEEE
T2 - 2014 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)
Y2 - 1 June 2014 through 1 June 2014
ER -