Thermal placement for high-performance multichip modules

Kai-Yuan Chao, D. F. Wong

Research output: Chapter in book/report/conference proceedingChapterpeer-review

23 Citations (Scopus)

Abstract

A placement scheme that considers both electrical performance requirements and thermal behavior for the high-performance multichip modules is described in this paper. Practical thermal models are used for placement of high-speed chips in multichip module packages under two different cooling environments: conduction cooling and convection cooling. Placement methods are modified to optimize conventional electrical performance and chip junction temperatures.

Original languageEnglish
Title of host publication1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors
PublisherIEEE
Pages218-223
Number of pages6
ISBN (Print)0818671653
DOIs
Publication statusPublished - Oct 1995
Event1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors - Austin, United States
Duration: 2 Oct 19954 Oct 1995
https://ieeexplore.ieee.org/xpl/conhome/4053/proceeding (Link to conference proceedings)

Publication series

NameProceedings of 1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors

Conference

Conference1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors
Country/TerritoryUnited States
CityAustin
Period2/10/954/10/95
Internet address

Scopus Subject Areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'Thermal placement for high-performance multichip modules'. Together they form a unique fingerprint.

Cite this