Switch bound allocation for maximizing routability in timing-driven routing of FPGAs

Kai Zhu; D. F. Wong

doi:10.1145/196244.196324

Switch bound allocation for maximizing routability in timing-driven routing of FPGAs

Kai Zhu, D. F. Wong

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Research output: Chapter in book/report/conference proceeding › Chapter › peer-review

Abstract

In segmented channel routing of row-based FPGAs, the routability and interconnection delays depend on the choice of the upper bounds on the number of programmable switches used in routing net segments in the channel. Traditionally, the upper bounds for the net segments in the same channel are set uniformly. In this paper, we present algorithms for determining the upper bounds for all net segments of a net simultaneously, so that the predefined source-to-sink delay bound on the net is satisfied and the routability of the net is maximized. The upper bounds on net segments in a channel thus in general are non-uniform. Preliminary experimental results show that the algorithms can significantly improve routability and reduce delay bound violation as compared with the traditional approach.

Original language	English
Title of host publication	31st ACM/IEEE Design Automation Conference - Proceedings 1994
Publisher	Association for Computing Machinery (ACM)
Pages	165-170
Number of pages	6
ISBN (Print)	9780897916530, 0897916530
DOIs	https://doi.org/10.1145/196244.196324
Publication status	Published - Jun 1994
Event	31st ACM/IEEE-CAS/EDAC Design Automation Conference, DAC 1994 - San Diego, United States Duration: 6 Jun 1994 → 10 Jun 1994 https://dl.acm.org/doi/proceedings/10.1145/196244 (Link to conference proceedings) https://ieeexplore.ieee.org/xpl/conhome/10665/proceeding

Publication series

Name	ACM/IEEE Design Automation Conference - Proceedings
ISSN (Print)	0738-100X

Conference

Conference	31st ACM/IEEE-CAS/EDAC Design Automation Conference, DAC 1994
Country/Territory	United States
City	San Diego
Period	6/06/94 → 10/06/94
Internet address	https://dl.acm.org/doi/proceedings/10.1145/196244 (Link to conference proceedings) https://ieeexplore.ieee.org/xpl/conhome/10665/proceeding

Scopus Subject Areas

Hardware and Architecture
Control and Systems Engineering

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10.1145/196244.196324

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title = "Switch bound allocation for maximizing routability in timing-driven routing of FPGAs",

abstract = "In segmented channel routing of row-based FPGAs, the routability and interconnection delays depend on the choice of the upper bounds on the number of programmable switches used in routing net segments in the channel. Traditionally, the upper bounds for the net segments in the same channel are set uniformly. In this paper, we present algorithms for determining the upper bounds for all net segments of a net simultaneously, so that the predefined source-to-sink delay bound on the net is satisfied and the routability of the net is maximized. The upper bounds on net segments in a channel thus in general are non-uniform. Preliminary experimental results show that the algorithms can significantly improve routability and reduce delay bound violation as compared with the traditional approach.",

author = "Kai Zhu and Wong, {D. F.}",

note = "Funding Information: This work was partially supported by the Texas Advanced Research Program under Grant No.003658459. Publisher Copyright: {\textcopyright} 1994 ACM ; 31st ACM/IEEE-CAS/EDAC Design Automation Conference, DAC 1994 ; Conference date: 06-06-1994 Through 10-06-1994",

year = "1994",

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language = "English",

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series = "ACM/IEEE Design Automation Conference - Proceedings",

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booktitle = "31st ACM/IEEE Design Automation Conference - Proceedings 1994",

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Zhu, K & Wong, DF 1994, Switch bound allocation for maximizing routability in timing-driven routing of FPGAs. in 31st ACM/IEEE Design Automation Conference - Proceedings 1994. ACM/IEEE Design Automation Conference - Proceedings, Association for Computing Machinery (ACM), pp. 165-170, 31st ACM/IEEE-CAS/EDAC Design Automation Conference, DAC 1994, San Diego, California, United States, 6/06/94. https://doi.org/10.1145/196244.196324

Switch bound allocation for maximizing routability in timing-driven routing of FPGAs. / Zhu, Kai; Wong, D. F.
31st ACM/IEEE Design Automation Conference - Proceedings 1994. Association for Computing Machinery (ACM), 1994. p. 165-170 (ACM/IEEE Design Automation Conference - Proceedings).

Research output: Chapter in book/report/conference proceeding › Chapter › peer-review

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Switch bound allocation for maximizing routability in timing-driven routing of FPGAs

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