Abstract
As device feature size decreases, interconnection delay becomes the dominating factor of system performance. Thus it is important that accurate physical information is used during high level synthesis. In this paper, we consider the problem of simultaneously performing functional-unit binding and floorplanning. Experimental results indicate that our approach to combine binding and floorplanning is superior to the traditional approach of separating the two tasks.
Original language | English |
---|---|
Title of host publication | 1994 IEEE/ACM International Conference On Computer-aided Design, ICCAD 1994 |
Publisher | IEEE |
Pages | 317-321 |
Number of pages | 5 |
ISBN (Print) | 0818664177, 0818630108 |
DOIs | |
Publication status | Published - Nov 1994 |
Event | 1994 IEEE/ACM International Conference on Computer-aided Design, ICCAD 1994 - San Jose, United States Duration: 6 Nov 1994 → 10 Nov 1994 https://ieeexplore.ieee.org/xpl/conhome/4983/proceeding (Link to conference proceedings) |
Publication series
Name | Proceedings of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
---|
Conference
Conference | 1994 IEEE/ACM International Conference on Computer-aided Design, ICCAD 1994 |
---|---|
Country/Territory | United States |
City | San Jose |
Period | 6/11/94 → 10/11/94 |
Internet address |
|
Scopus Subject Areas
- Software
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering