Abstract
High power consumption not only leads to short battery life for hand-held devices but also causes on-chip thermal and reliability problems in general. As power consumption is proportional to the square of supply voltage, reducing supply voltage can significantly reduce power consumption. Multi-supply voltage (MSV) has previously been introduced to provide finer grain power and performance tradeoff. In this paper, we propose a methodology on top of a set of algorithms to exploit nontrivial voltage island boundaries for optimal power versus design-cost tradeoff under performance requirement. Our algorithms are efficient, robust, and error-bounded and can be flexibly tuned to optimize for various design objectives (e.g., minimal power within a given number of voltage islands, or minimal fragmentation in voltage islands within a given power bound) depending on the design requirement. Our experiment on real industry designs shows a tenfold improvement of our method over current logical-boundary-based industry approach.
Original language | English |
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Pages (from-to) | 1256-1269 |
Number of pages | 14 |
Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Volume | 26 |
Issue number | 7 |
Early online date | 18 Jun 2007 |
DOIs | |
Publication status | Published - Jul 2007 |
Scopus Subject Areas
- Software
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering
User-Defined Keywords
- low power
- optimization
- timing
- voltage island