PLA Folding by Simulated Annealing

D. F. Wong, H. W. Leong, C. L. Liu

Research output: Contribution to journalJournal articlepeer-review

12 Citations (Scopus)


We present in this paper a simulated-annealing programmable-logic-array (PLA) folding algorithm for simple as well as multiple column folding. Experimental results indicate that our algorithm performs very well. In many test problems, our results are superior to those produced by the well-known heuristic algorithm due to De Micheli and Sangiovanni. We also show how our algorithm can be extended to handle constrained folding.

Original languageEnglish
Pages (from-to)208-215
Number of pages8
JournalIEEE Journal of Solid-State Circuits
Issue number2
Publication statusPublished - Apr 1987

Scopus Subject Areas

  • Electrical and Electronic Engineering


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