PLA Folding by Simulated Annealing

D. F. Wong; H. W. Leong; C. L. Liu

doi:10.1109/JSSC.1987.1052704

PLA Folding by Simulated Annealing

D. F. Wong, H. W. Leong, C. L. Liu

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12 Citations (Scopus)

Abstract

We present in this paper a simulated-annealing programmable-logic-array (PLA) folding algorithm for simple as well as multiple column folding. Experimental results indicate that our algorithm performs very well. In many test problems, our results are superior to those produced by the well-known heuristic algorithm due to De Micheli and Sangiovanni. We also show how our algorithm can be extended to handle constrained folding.

Original language	English
Pages (from-to)	208-215
Number of pages	8
Journal	IEEE Journal of Solid-State Circuits
Volume	22
Issue number	2
DOIs	https://doi.org/10.1109/JSSC.1987.1052704
Publication status	Published - Apr 1987

Scopus Subject Areas

Electrical and Electronic Engineering

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10.1109/JSSC.1987.1052704

Cite this

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title = "PLA Folding by Simulated Annealing",

abstract = "We present in this paper a simulated-annealing programmable-logic-array (PLA) folding algorithm for simple as well as multiple column folding. Experimental results indicate that our algorithm performs very well. In many test problems, our results are superior to those produced by the well-known heuristic algorithm due to De Micheli and Sangiovanni. We also show how our algorithm can be extended to handle constrained folding.",

author = "Wong, {D. F.} and Leong, {H. W.} and Liu, {C. L.}",

year = "1987",

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journal = "IEEE Journal of Solid-State Circuits",

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T1 - PLA Folding by Simulated Annealing

AU - Wong, D. F.

AU - Leong, H. W.

AU - Liu, C. L.

PY - 1987/4

Y1 - 1987/4

N2 - We present in this paper a simulated-annealing programmable-logic-array (PLA) folding algorithm for simple as well as multiple column folding. Experimental results indicate that our algorithm performs very well. In many test problems, our results are superior to those produced by the well-known heuristic algorithm due to De Micheli and Sangiovanni. We also show how our algorithm can be extended to handle constrained folding.

AB - We present in this paper a simulated-annealing programmable-logic-array (PLA) folding algorithm for simple as well as multiple column folding. Experimental results indicate that our algorithm performs very well. In many test problems, our results are superior to those produced by the well-known heuristic algorithm due to De Micheli and Sangiovanni. We also show how our algorithm can be extended to handle constrained folding.

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U2 - 10.1109/JSSC.1987.1052704

DO - 10.1109/JSSC.1987.1052704

M3 - Journal article

AN - SCOPUS:0023327102

SN - 0018-9200

VL - 22

SP - 208

EP - 215

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

IS - 2

ER -

PLA Folding by Simulated Annealing

Abstract

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