On process-aware 1-D standard cell design

Hongbo Zhang, Martin D. F. Wong, Kai Yuan Chao

Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

19 Citations (Scopus)


When VLSI technology scales down to sub-40nm process node, systematic variation introduced by the lithography is a persistent challenge to the manufacturability. The limitation of the resolution enhancement technologies (RETs) forces people to adopt a regular cell design methodology. In this paper, targeted on 1-D cell design, we use simulation data to analyze the relationship between the line-end gap distribution and printability. Based on the gap distribution preferences, an optimal algorithm is provided to efficiently extend the line ends and insert dummies, which will significantly improve the gap distribution and help printability. Experimental results on 45nm and 32nm processes show that significant improvement can be obtained on edge placement error (EPE).

Original languageEnglish
Title of host publicationProceedings of The 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010
Number of pages5
ISBN (Print)9781424457656
Publication statusPublished - 21 Jan 2010
Event15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010 - Taipei International Convention Center, Taipei, Taiwan, Province of China
Duration: 18 Jan 201021 Jan 2010
https://www.aspdac.com/aspdac2010/ (Conference website)
https://www.aspdac.com/aspdac2010/pdf/ASP-DAC%202010%20Advance%20Program%20Final1215.pdf (Conference programme)
https://ieeexplore.ieee.org/xpl/conhome/5415928/proceeding (Conference proceedings)

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DACPapers, ICCAD
ISSN (Print)2153-6961
ISSN (Electronic)2153-697X


Conference15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010
Country/TerritoryTaiwan, Province of China
Internet address

Scopus Subject Areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering


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