Abstract
Electron projection lithography (EPL) is a leading candidate for next generation lithography (NGL) in VLSI production. The membrane mask used in EPL is divided into sub-fields by struts for structural support. A layout must be partitioned into these sub-fields on mask and then stitched back together by the EPL tool on wafer. To minimize possible stitching errors, partitioning of a mask layout should minimize cuts of layout features in the overlapping area between two adjacent sub-fields. This paper presents the first formulation of the mask layout partitioning problem for EPL as a graph problem. The graph formulation is optimally solved with a shortest path approach. Two other techniques are also presented to speed up computation. Experimental runs on data from a real industry design show excellent results.
| Original language | English |
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| Title of host publication | Proceedings of The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2002 |
| Place of Publication | United States |
| Publisher | Association for Computing Machinery (ACM) |
| Pages | 514-518 |
| Number of pages | 5 |
| ISBN (Print) | 9780780376076 |
| DOIs | |
| Publication status | Published - Nov 2002 |
| Event | 2002 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2002 - San Jose, United States Duration: 10 Nov 2002 → 14 Nov 2002 https://dl.acm.org/doi/proceedings/10.1145/774572 (Conference proceedings) |
Publication series
| Name | Proceedings of the IEEE/ACM international conference on Computer-aided design, ICCAD |
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| ISSN (Print) | 1092-3152 |
Conference
| Conference | 2002 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2002 |
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| Country/Territory | United States |
| City | San Jose |
| Period | 10/11/02 → 14/11/02 |
| Internet address |
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