NovelRewrite: Node-Level Parallel AIG Rewriting

Shiju Lin, Jinwei Liu, Tianji Liu, Martin D.F. Wong, Evangeline F.Y. Young

Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

4 Citations (Scopus)

Abstract

Logic rewriting is an important part in logic optimization. It rewrites a circuit by replacing local subgraphs with logically equivalent ones, so that the area and the delay of the circuit can be optimized. This paper introduces a parallel AIG rewriting algorithm with a new concept of logical cuts. Experiments show that this algorithm implemented with one GPU can be on average 32X faster than the logic rewriting in the logic synthesis tool ABC on large benchmarks. Compared with other logic rewriting acceleration works, ours has the best quality and the shortest running time.

Original languageEnglish
Title of host publication59th ACM/IEEE Design Automation Conference - Proceedings 2022
PublisherAssociation for Computing Machinery (ACM)
Pages427-432
Number of pages6
ISBN (Electronic)9781450391429
ISBN (Print)9781450391429
DOIs
Publication statusPublished - Jul 2022
Event59th ACM/IEEE Design Automation Conference, DAC 2022 - San Francisco, United States
Duration: 10 Jul 202214 Jul 2022
https://www.dac.com/About/Conference-Archive/59th-DAC-2022 (Conference website)
https://www.dac.com/Portals/0/DAC%2059/59DAC%20Onsite%20Guide_v3.pdf?ver=GbBS5sBuhmEVJWVEz9CNIg%3d%3d (Conference programme)
https://dl.acm.org/doi/proceedings/10.1145/3489517 (Conference proceedings)

Publication series

NameACM/IEEE Design Automation Conference - Proceedings
ISSN (Print)0738-100X

Conference

Conference59th ACM/IEEE Design Automation Conference, DAC 2022
Country/TerritoryUnited States
CitySan Francisco
Period10/07/2214/07/22
Internet address

Scopus Subject Areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modelling and Simulation

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