Abstract
Logic rewriting is an important part in logic optimization. It rewrites a circuit by replacing local subgraphs with logically equivalent ones, so that the area and the delay of the circuit can be optimized. This paper introduces a parallel AIG rewriting algorithm with a new concept of logical cuts. Experiments show that this algorithm implemented with one GPU can be on average 32X faster than the logic rewriting in the logic synthesis tool ABC on large benchmarks. Compared with other logic rewriting acceleration works, ours has the best quality and the shortest running time.
Original language | English |
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Title of host publication | 59th ACM/IEEE Design Automation Conference - Proceedings 2022 |
Publisher | Association for Computing Machinery (ACM) |
Pages | 427-432 |
Number of pages | 6 |
ISBN (Electronic) | 9781450391429 |
ISBN (Print) | 9781450391429 |
DOIs | |
Publication status | Published - Jul 2022 |
Event | 59th ACM/IEEE Design Automation Conference, DAC 2022 - San Francisco, United States Duration: 10 Jul 2022 → 14 Jul 2022 https://www.dac.com/About/Conference-Archive/59th-DAC-2022 (Conference website) https://www.dac.com/Portals/0/DAC%2059/59DAC%20Onsite%20Guide_v3.pdf?ver=GbBS5sBuhmEVJWVEz9CNIg%3d%3d (Conference programme) https://dl.acm.org/doi/proceedings/10.1145/3489517 (Conference proceedings) |
Publication series
Name | ACM/IEEE Design Automation Conference - Proceedings |
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ISSN (Print) | 0738-100X |
Conference
Conference | 59th ACM/IEEE Design Automation Conference, DAC 2022 |
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Country/Territory | United States |
City | San Francisco |
Period | 10/07/22 → 14/07/22 |
Internet address |
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Scopus Subject Areas
- Computer Science Applications
- Control and Systems Engineering
- Electrical and Electronic Engineering
- Modelling and Simulation