Abstract
Recently staggered pin arrays are introduced for modern designs with high pin density. Although some studies have been done on escape routing for hexagonal arrays, the hexagonal array is only a special kind of staggered pin array. There exist other kinds of staggered pin arrays in current industrial designs, and the existing works cannot be extended to solve them. In this paper, we study the escape routing problem on staggered pin arrays. Network flow models are proposed to correctly model the capacity constraints of staggered pin arrays. Our models are guaranteed to find an escape routing satisfying the capacity constraints if there exists one. The correctness of these models lead to an optimal algorithm.
| Original language | English |
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| Title of host publication | 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC) |
| Publisher | IEEE Canada |
| Pages | 193-198 |
| Number of pages | 6 |
| ISBN (Electronic) | 9781467330305, 9781467330282 |
| ISBN (Print) | 9781467330299 |
| DOIs | |
| Publication status | Published - 22 Jan 2013 |
| Event | 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 - Yokohama, Japan Duration: 22 Jan 2013 → 25 Jan 2013 https://www.aspdac.com/aspdac2013/ (Conference website) https://ieeexplore.ieee.org/xpl/conhome/6507004/proceeding (Conference proceedings) |
Publication series
| Name | Proceedings of the ASP-DAC Asia South Pacific Design Automation Conference |
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| Publisher | IEEE |
| ISSN (Print) | 2153-6961 |
Conference
| Conference | 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 |
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| Country/Territory | Japan |
| City | Yokohama |
| Period | 22/01/13 → 25/01/13 |
| Internet address |
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User-Defined Keywords
- Routing
- Pins
- Mathematical model
- Law
- Wires
- Equations