Multiple PLA Folding by the Method of Simulated Annealing

D. F. Wong*, H. W. Leong, C. L. Liu

*Corresponding author for this work

Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

7 Citations (Scopus)

Abstract

A simulated-annealing PLA-folding algorithm for simple as well as multiple column folding is presented. Experimental results indicate that this algorithm performs well. In many test problems, the results are superior to those produced by a previous well-known heuristic algorithm. It is shown that the simulated annealing algorithm can be extended to handle constrained folding.

Original languageEnglish
Title of host publicationProceedings of the Custom Integrated Circuits Conference 1986
PublisherIEEE
Pages351-355
Number of pages5
Publication statusPublished - May 1986
Event1986 Custom Integrated Circuits Conference, CCIC 1986 - Rochester Riverside Convention Center, Genesee Plaza-Holiday Inn, New York, United States
Duration: 12 May 198615 May 1986

Publication series

NameProceedings of the Custom Integrated Circuits Conference
PublisherIEEE
ISSN (Print)0886-5930

Conference

Conference1986 Custom Integrated Circuits Conference, CCIC 1986
Country/TerritoryUnited States
CityNew York
Period12/05/8615/05/86

Scopus Subject Areas

  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'Multiple PLA Folding by the Method of Simulated Annealing'. Together they form a unique fingerprint.

Cite this