TY - GEN
T1 - Massively parallel network coding on GPUs
AU - Chu, Xiaowen
AU - Zhao, Kaiyong
AU - Wang, Mea
PY - 2008
Y1 - 2008
N2 - Network coding has recently been widely applied in various networks for system throughput improvement and/or resilience to network dynamics. However, the computational overhead introduced by the network coding operations is not negligible and has become the cornerstone for real deployment of network coding. In this paper, we exploit the computing power of contemporary Graphic Processing Units (GPUs) to accelerate the network coding operations. We proposed three parallel algorithms that maximize the parallelism of the encoding and decoding processes, i.e., the power of GPUs is fully utilized. This paper also shares our optimization design choices and our workarounds to the challenges encountered in working with GPUs. With our implementation of the algorithms, we are able to achieve up to 12 times of speedup over the highly optimized CPU counterpart, using the NVIDIA GPU and the Computer Unified Device Architecture (CUDA) programming model.
AB - Network coding has recently been widely applied in various networks for system throughput improvement and/or resilience to network dynamics. However, the computational overhead introduced by the network coding operations is not negligible and has become the cornerstone for real deployment of network coding. In this paper, we exploit the computing power of contemporary Graphic Processing Units (GPUs) to accelerate the network coding operations. We proposed three parallel algorithms that maximize the parallelism of the encoding and decoding processes, i.e., the power of GPUs is fully utilized. This paper also shares our optimization design choices and our workarounds to the challenges encountered in working with GPUs. With our implementation of the algorithms, we are able to achieve up to 12 times of speedup over the highly optimized CPU counterpart, using the NVIDIA GPU and the Computer Unified Device Architecture (CUDA) programming model.
KW - CUDA
KW - GPU computing
KW - Network coding
UR - http://www.scopus.com/inward/record.url?scp=62849109596&partnerID=8YFLogxK
U2 - 10.1109/PCCC.2008.4745113
DO - 10.1109/PCCC.2008.4745113
M3 - Conference proceeding
AN - SCOPUS:62849109596
SN - 9781424433674
T3 - Conference Proceedings of the IEEE International Performance, Computing, and Communications Conference
SP - 144
EP - 151
BT - 2008 IEEE International Performance Computing and Communications Conference, IPCCC 2008
T2 - 2008 IEEE International Performance Computing and Communications Conference, IPCCC 2008
Y2 - 7 December 2008 through 9 December 2008
ER -