Low power design with multi-Vdd and voltage islands (Abstract)

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Abstract

Design for low power has become a key requirement in today's SoC design, especially for mobile applications. Multi-Vdd is an effective method to reduce both leakage and dynamic power, by assigning different supply voltages to cells according to their timing criticality. In a multi-Vdd design, cells of different supply voltage are often grouped into small number of voltage islands (each having a single supply voltage), in order to avoid complex power supply system and excessive amount of level shifters (as the former would cause increase in design cost and the latter would cause extra overhead in area, delay and power). In this talk, we present a low power design methodology which manages power, timing and design cost by using multi-Vdd and voltage islands. We first present an algorithm that in a multi-Vdd design with cells assigned different supply voltage according to their timing criticality, automatically group the cells into a set of voltage islands that balance the power versus design cost tradeoff under performance requirement. One prerequisite of the voltage island grouping algorithm, is an initial voltage assignment at the standard cell level that meets timing. In the second part of this talk, we present a method to produce an initial voltage assignment which not only meets timing but also forms good proximity of high voltage cells to provide the voltage island grouping algorithm with a smooth input. Although the voltage assignment algorithm tries to form good proximity of high voltage cells for better voltage island grouping, however, sometimes a few isolated critical cells (called outlier) may still exists in the resulting voltage assignment, causing disproportionately expensive penalty to the final voltage island grouping. In the last part of this talk, we propose an algorithm to improve the voltage assignment by automatic outlier detection followed by incremental placement. Experimental results on industrial circuits will be presented. This talk is based on [1-3].

Original languageEnglish
Title of host publicationASICON 2007 - 2007 7th International Conference on ASIC Proceeding
PublisherIEEE
Pages1325
Number of pages1
ISBN (Electronic)9781424411320
ISBN (Print)1424411327, 9781424411313
DOIs
Publication statusPublished - Oct 2007
Event2007 7th International Conference on ASIC, ASICON 2007 - Guilin, China
Duration: 26 Oct 200729 Oct 2007
https://ieeexplore.ieee.org/xpl/conhome/4415535/proceeding

Publication series

NameInternational Conference on ASIC Proceeding
ISSN (Print)2162-7541
ISSN (Electronic)2162-755X

Conference

Conference2007 7th International Conference on ASIC, ASICON 2007
Country/TerritoryChina
CityGuilin
Period26/10/0729/10/07
Internet address

Scopus Subject Areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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