Lithography-aware layout modification considering performance impact

Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Kai-Yuan Chao

Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

10 Citations (Scopus)


As regular design rules become necessary in sub-45nm node circuit design, 1-D design has shown its advantages and has drawn intensive research interest. In 1-D design, line-end gaps are the main sources of printing difficulties. Recently, we [5] demonstrated that printability can be significantly improved by intelligent (litho-aware) rearrangement of the gap distribution with techniques such as line-end extension and dummy insertion. Note that poly/gate redistribution techniques require layout modification of the original layout and thus will impact circuit performance and power consumption. Such potentially undesirable impacts on performance and power were not considered in [5] and deserve a careful investigation, which is the subject of our study. In this paper, we present performance-driven gate redistribution algorithms which consider bounds on line-end extension. Experimental results demonstrate the feasibility of our algorithms, and lithography simulation and circuit analysis show the trend of the trade off between printability, delay, and power.

Original languageEnglish
Title of host publicationProceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011
Number of pages5
ISBN (Electronic)9781612849140
ISBN (Print)9781612849133
Publication statusPublished - 14 Nov 2011
Event12th International Symposium on Quality Electronic Design, ISQED 2011 - Santa Clara, United States
Duration: 14 Mar 201116 Mar 2011 (Conference website) (Conference programme) (Conference proceedings)

Publication series

NameProceedings of The International Symposium on Quality Electronic Design, ISQED
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295


Symposium12th International Symposium on Quality Electronic Design, ISQED 2011
Country/TerritoryUnited States
CitySanta Clara
Internet address

Scopus Subject Areas

  • Electrical and Electronic Engineering


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