Linear time EUV blank defect mitigation algorithm considering tolerance to inspection inaccuracy

Extreme ultraviolet lithography (EUVL) is a leading candidate for next generation lithography (NGL). At 11nm technology node, the size of the minimum printable multi-layer (ML) mask defect is as small as 20nm. As a result, it is extremely difficult to produce defect-free ML mask blanks. Instead, by allowing a certain number of printable defects on the blank, the EUVL cost of ownership can be tremendously reduced. However, those printable blank defects must be mitigated later in the mask fabrication process in order not to sacrifice yield. One effective defect mitigation approach is to cover the defects by device patterns, such that the defects will no longer be printable. However, there can be billions of device patterns in one single layer which have to be shifted together within a certain margin due to the exposure alignment requirement. Thus an efficient way to cover all defects simultaneously via global device pattern shifting is sorely needed. In addition, it is very difficult to measure the position of each defect accurately with the current blank inspection tool, so the defect position inaccuracy has to be taken into consideration at the same time. This paper formulates the blank defect coverage problem into a rectilinear polygon shrinking and intersection problem and develops a highly efficient algorithm whose time complexity is linear with respect to the density of device patterns. In addition, within the shift margin there are usually multiple positions to locate a layout on a defective blank where all defects are simultaneously covered by the device patterns; our algorithm is able to report the optimal layout location with the maximum tolerance for the inspection inaccuracy.