Layer assignment for high-performance multi-chip modules

Kai-Yuan Chao, D. F. Wong

Research output: Chapter in book/report/conference proceedingChapterpeer-review

1 Citation (Scopus)


In this paper, we present a layer assignment method for high-performance multi-chip module environments. In contrast with treating global routing and layer assignment separately, our method assigns nets to layers while considering preferable global routing topologies simultaneously. We take transmission line effects into account to avoid noise in high-speed circuit packages. The problem is formulated as a quadratic Boolean programming problem and an algorithm is presented to solve the problem after linearization. Our method is applied to a set of benchmark circuits to demonstrate the effectiveness.

Original languageEnglish
Title of host publication1994 IEEE/ACM International Conference On Computer-aided Design, ICCAD 1994
Number of pages6
ISBN (Print)0818664177, 0818630108
Publication statusPublished - Nov 1994
Event1994 IEEE/ACM International Conference on Computer-aided Design, ICCAD 1994 - San Jose, United States
Duration: 6 Nov 199410 Nov 1994 (Link to conference proceedings)

Publication series

NameProceedings of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems


Conference1994 IEEE/ACM International Conference on Computer-aided Design, ICCAD 1994
Country/TerritoryUnited States
CitySan Jose
Internet address

Scopus Subject Areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering


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