Abstract
As the IC technology scales down, the effect of IR drop/ground bounce becomes increasingly significant. IR drop and ground bounce can compromise the gate driving capability and degrade the IC performance, and even can make IC functional failures. Hence, it is crucial to capture this effect efficiently and accurately in order to improve circuit reliability. In this paper, we proposed a timing model with consideration of IR drop and ground bounce. Our model can be derived directly from the existing timing tables (e.g. Synopsys.db or CLF tables), which are used in normal timing analysis. Compared with the traditional k-factor approach, our method does not require SPICE netlist and SPICE simulations. Moreover, the accuracy of our model is better than k-factor approach.
Original language | English |
---|---|
Title of host publication | Proceedings of the IEEE Computer Society Annual Symposium on VLSI |
Subtitle of host publication | New Frontiers in VLSI Design, ISVLSI 2005 |
Editors | Asim Smailagic, Nagarajan Ranganathan |
Place of Publication | United States |
Publisher | IEEE |
Pages | 226-231 |
Number of pages | 6 |
DOIs | |
Publication status | Published - May 2005 |
Event | IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI System Design, ISVLSI 2005 - Tampa, United States Duration: 11 May 2005 → 12 May 2005 https://ieeexplore.ieee.org/xpl/conhome/9780/proceeding (Conference proceedings) |
Publication series
Name | Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI |
---|---|
ISSN (Print) | 2159-3469 |
ISSN (Electronic) | 2159-3477 |
Symposium
Symposium | IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI System Design, ISVLSI 2005 |
---|---|
Country/Territory | United States |
City | Tampa |
Period | 11/05/05 → 12/05/05 |
Internet address |
|