Integrated power supply planning and floorplanning

I Min Liu; Hung Ming Chen; Tan Li Chou; Adnan  Aziz; D. F. Wong

doi:10.1145/370155.370539

Integrated power supply planning and floorplanning

I Min Liu, Hung Ming Chen, Tan Li Chou, Adnan Aziz, D. F. Wong

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Research output: Chapter in book/report/conference proceeding › Conference proceeding › peer-review

17 Citations (Scopus)

Abstract

One of the most challenging issues in today's high-performance VLSI design is to ensure high-quality power supply to each individual circuit blocks. Reduced power supply voltage can result in slower cell switching, or even circuit failure. Nevertheless, most floorplanning methodologies have ignored power supply considerations. Thus, the resulting floorplan may suffer from local hot spots and insufficient power supply for certain circuit blocks. In this paper, we present an optimal power supply planning algorithm based on network flow to shorten the current paths from power bumps to local power supply wirings. We have incorporated our algorithm into a floorplanning algorithm for integrated floorplanning and power supply planning. Experimental results are encouraging.

Original language	English
Title of host publication	Proceedings of The 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001
Place of Publication	United States
Publisher	Association for Computing Machinery (ACM)
Pages	589-594
Number of pages	6
ISBN (Print)	9780780366343
DOIs	https://doi.org/10.1145/370155.370539
Publication status	Published - Jan 2001
Event	6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001 - Conference Center, Pacifico Yokohama, Yokohama, Japan Duration: 30 Jan 2001 → 2 Feb 2001 https://www.aspdac.com/2001/ (Conference website ) https://www.aspdac.com/2001/eng/ap/techprg2001.pdf (Conference program) https://dl.acm.org/doi/proceedings/10.1145/370155 (Conference proceedings)

Publication series

Name	Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC
ISSN (Print)	2153-6961
ISSN (Electronic)	2153-697X

Conference

Conference	6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001
Country/Territory	Japan
City	Yokohama
Period	30/01/01 → 2/02/01
Internet address	https://www.aspdac.com/2001/ (Conference website ) https://www.aspdac.com/2001/eng/ap/techprg2001.pdf (Conference program) https://dl.acm.org/doi/proceedings/10.1145/370155 (Conference proceedings)

Access to Document

10.1145/370155.370539

Cite this

Liu, I. M., Chen, H. M., Chou, T. L., Aziz, A., & Wong, D. F. (2001). Integrated power supply planning and floorplanning. In Proceedings of The 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001 (pp. 589-594). (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC). Association for Computing Machinery (ACM). https://doi.org/10.1145/370155.370539

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title = "Integrated power supply planning and floorplanning",

abstract = "One of the most challenging issues in today's high-performance VLSI design is to ensure high-quality power supply to each individual circuit blocks. Reduced power supply voltage can result in slower cell switching, or even circuit failure. Nevertheless, most floorplanning methodologies have ignored power supply considerations. Thus, the resulting floorplan may suffer from local hot spots and insufficient power supply for certain circuit blocks. In this paper, we present an optimal power supply planning algorithm based on network flow to shorten the current paths from power bumps to local power supply wirings. We have incorporated our algorithm into a floorplanning algorithm for integrated floorplanning and power supply planning. Experimental results are encouraging.",

author = "Liu, {I Min} and Chen, {Hung Ming} and Chou, {Tan Li} and Adnan Aziz and Wong, {D. F.}",

note = "Funding information: the work of Adnan Aziz was partially supported by an NSF Career Award, by the Texas Advanced Technology Program under Grant No. 0036580235, and by a gift from IBM Corporation. The work of Hung-Ming Chen and D.F. Wong was partially supported by the National Science Foundation under grant CCR-9912390, by the Texas Advanced Research Program under Grant No. 003658288, and by grants from IBM and Intel. Publisher copyright: {\textcopyright} 2001 IEEE; 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001 ; Conference date: 30-01-2001 Through 02-02-2001",

year = "2001",

month = jan,

doi = "10.1145/370155.370539",

language = "English",

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booktitle = "Proceedings of The 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001",

address = "United States",

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Liu, IM, Chen, HM, Chou, TL, Aziz, A & Wong, DF 2001, Integrated power supply planning and floorplanning. in Proceedings of The 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001. Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC, Association for Computing Machinery (ACM), United States, pp. 589-594, 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001, Yokohama, Japan, 30/01/01. https://doi.org/10.1145/370155.370539

Integrated power supply planning and floorplanning. / Liu, I Min; Chen, Hung Ming; Chou, Tan Li et al.
Proceedings of The 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001. United States: Association for Computing Machinery (ACM), 2001. p. 589-594 (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in book/report/conference proceeding › Conference proceeding › peer-review

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N1 - Funding information: the work of Adnan Aziz was partially supported by an NSF Career Award, by the Texas Advanced Technology Program under Grant No. 0036580235, and by a gift from IBM Corporation. The work of Hung-Ming Chen and D.F. Wong was partially supported by the National Science Foundation under grant CCR-9912390, by the Texas Advanced Research Program under Grant No. 003658288, and by grants from IBM and Intel. Publisher copyright: © 2001 IEEE

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AB - One of the most challenging issues in today's high-performance VLSI design is to ensure high-quality power supply to each individual circuit blocks. Reduced power supply voltage can result in slower cell switching, or even circuit failure. Nevertheless, most floorplanning methodologies have ignored power supply considerations. Thus, the resulting floorplan may suffer from local hot spots and insufficient power supply for certain circuit blocks. In this paper, we present an optimal power supply planning algorithm based on network flow to shorten the current paths from power bumps to local power supply wirings. We have incorporated our algorithm into a floorplanning algorithm for integrated floorplanning and power supply planning. Experimental results are encouraging.

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Liu IM, Chen HM, Chou TL, Aziz A, Wong DF. Integrated power supply planning and floorplanning. In Proceedings of The 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001. United States: Association for Computing Machinery (ACM). 2001. p. 589-594. (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC). doi: 10.1145/370155.370539

Integrated power supply planning and floorplanning

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