Integrated end-to-end delay analysis for regulated ATM networks

Joseph K Y NG*, Shibin Song, Wei Zhao

*Corresponding author for this work

Research output: Contribution to journalJournal articlepeer-review

4 Citations (Scopus)


In this paper, we present an efficient and effective method to derive the worst case end-to-end delay for ATM network. Traffic and service description plays an important part in the end-to-end delay analysis. By utilizing the inverse of these arrival and service functions, we can effectively compute the worst case delay of an ATM switch. We analyze and compare the performance of an ATM switch with priority driven and FIFO scheduling policies using different workload sets and under different utilization. We also compare the performance using our proposed "integrated" method with the traditional "independent" method. From our simulation experiments, we found out that our method always produced a better estimation of cell delay within an ATM network.

Original languageEnglish
Pages (from-to)93-124
Number of pages32
JournalReal-Time Systems
Issue number1
Publication statusPublished - Jul 2003

Scopus Subject Areas

  • Control and Systems Engineering
  • Modelling and Simulation
  • Computer Science Applications
  • Computer Networks and Communications
  • Control and Optimization
  • Electrical and Electronic Engineering

User-Defined Keywords

  • ATM networks
  • End-to-end delay analysis
  • Hard real-time connections
  • Real-time communications
  • Real-time networks
  • Worst case delay


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