Floorplanning for low power designs

Kai-Yuan Chao; D. F. Wong

doi:10.1109/ISCAS.1995.521447

Floorplanning for low power designs

Kai-Yuan Chao, D. F. Wong

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Research output: Chapter in book/report/conference proceeding › Chapter › peer-review

9 Citations (Scopus)

Abstract

In this paper, a floorplanner for low power designs is presented. Our objective is to optimize total power consumption and area during the selection and placement of circuit modules. Furthermore, our method considers the reduction of power line noises, thermal reliability problems, and performance requirements.

Original language	English
Title of host publication	1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995
Publisher	IEEE
Pages	45-48
Number of pages	4
ISBN (Print)	0780325702
DOIs	https://doi.org/10.1109/ISCAS.1995.521447
Publication status	Published - May 1995
Event	1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995 - Seattle, United States Duration: 30 Apr 1995 → 3 May 1995 https://ieeexplore.ieee.org/xpl/conhome/3941/proceeding (Link to conference proceedings)

Publication series

Name	Proceedings of 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995

Conference

Conference	1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995
Country/Territory	United States
City	Seattle
Period	30/04/95 → 3/05/95
Internet address	https://ieeexplore.ieee.org/xpl/conhome/3941/proceeding (Link to conference proceedings)

Scopus Subject Areas

Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.1995.521447

Cite this

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title = "Floorplanning for low power designs",

abstract = "In this paper, a floorplanner for low power designs is presented. Our objective is to optimize total power consumption and area during the selection and placement of circuit modules. Furthermore, our method considers the reduction of power line noises, thermal reliability problems, and performance requirements.",

author = "Kai-Yuan Chao and Wong, {D. F.}",

note = "Funding Information: This work was partially supported by the Texas Advanced Research Program under Grant No.003658459. Publisher Copyright: {\textcopyright} 1995 IEEE ; 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995 ; Conference date: 30-04-1995 Through 03-05-1995",

year = "1995",

month = may,

doi = "10.1109/ISCAS.1995.521447",

language = "English",

isbn = "0780325702",

series = "Proceedings of 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995",

publisher = "IEEE",

pages = "45--48",

booktitle = "1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995",

address = "United States",

url = "https://ieeexplore.ieee.org/xpl/conhome/3941/proceeding",

}

Chao, K-Y & Wong, DF 1995, Floorplanning for low power designs. in 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995. Proceedings of 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, IEEE, pp. 45-48, 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, United States, 30/04/95. https://doi.org/10.1109/ISCAS.1995.521447

TY - CHAP

T1 - Floorplanning for low power designs

AU - Chao, Kai-Yuan

AU - Wong, D. F.

PY - 1995/5

Y1 - 1995/5

N2 - In this paper, a floorplanner for low power designs is presented. Our objective is to optimize total power consumption and area during the selection and placement of circuit modules. Furthermore, our method considers the reduction of power line noises, thermal reliability problems, and performance requirements.

AB - In this paper, a floorplanner for low power designs is presented. Our objective is to optimize total power consumption and area during the selection and placement of circuit modules. Furthermore, our method considers the reduction of power line noises, thermal reliability problems, and performance requirements.

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U2 - 10.1109/ISCAS.1995.521447

DO - 10.1109/ISCAS.1995.521447

M3 - Chapter

AN - SCOPUS:0029191645

SN - 0780325702

T3 - Proceedings of 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995

SP - 45

EP - 48

BT - 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995

PB - IEEE

T2 - 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995

Y2 - 30 April 1995 through 3 May 1995

ER -

Floorplanning for low power designs

Abstract

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