Exact algorithms for coupling capacitance minimization by adding one metal layer

Keyphrases

• Algorithm Complexity 20%
• Capacitance Minimization 100%
• Chip Design 20%
• Chip Fabrication 20%
• Chip Performance 20%
• Coupling Capacitance 100%
• Coupling Control 20%
• Exact Algorithm 100%
• Fasting Time 20%
• Feasible Solution 20%
• Integrated Device Manufacturer 20%
• Integrated Solutions 20%
• Layer-dependent 20%
• Layered Structure 20%
• Linear-time Algorithm 20%
• Low Volume 20%
• Manufacturability 20%
• Manufacturing Process 20%
• Metal Fill 20%
• Metal Layer 100%
• New Layers 20%
• Optimal Algorithm 20%
• Process Technology 20%
• Rapid Development 20%
• Routing Solution 20%
• Tight 20%
• Time Complexity 20%
• Time to Market 20%
• Two-layer 20%
• Volume Product 20%
• Wire Segments 40%

Computer Science

• Application Specific Integrated Circuit 33%
• Coupling Capacitance 100%
• Device Manufacturer 33%
• Exact Algorithm 100%
• Feasible Solution 33%
• Integrated Circuit 33%
• Integrated Solution 33%
• Optimal Algorithm 33%
• Postprocessing 33%
• Rapid Development 33%
• Routing Solution 33%
• Time Complexity 33%

Engineering

• Application Specific Integrated Circuit 20%
• Coupling Capacitance 100%
• Device Manufacturer 20%
• Exact Algorithm 100%
• Feasible Solution 20%
• Integrated Circuit 20%
• Linear Time 20%
• Manufacturability 20%
• Manufacturing Process 20%
• Metal Layer 100%
• Routing Solution 20%