Design, fabrication, testing and simulation of porous silicon based smart MEMS pressure sensor

C. Pramanik*, T. Islam, H. Saha, J. Bhattacharya, S. Banerjee, S. Dey

*Corresponding author for this work

Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

9 Citations (Scopus)

Abstract

Porous silicon based piezoresistive pressure sensor has been designed, fabricated and tested in the range of 0 to 1 bar and temperature range of 20°C to 80°C. A suitable signal conditioning analog circuit consisting of constant current generator and an offset adjustable low noise instrumentation amplifier has been designed and tested. The analog output is then digitized through an ADC and fed to FPGA. Architecture for compensation of nonlinear temperature dependence of pressure sensor has been implemented and tested in FPGA.A device model of porous silicon pressure sensor has also been developed with a view to realize a SMART pressure sensor.

Original languageEnglish
Title of host publicationProceedings of the 18th International Conference on VLSI Design
Place of PublicationCalifornia
PublisherIEEE
Pages235-240
Number of pages6
ISBN (Print)0769522645
DOIs
Publication statusPublished - 3 Jan 2005
Event18th International Conference on VLSI Design: Power Aware Design of VLSI Systems - Kolkata, India
Duration: 3 Jan 20057 Jan 2005
https://ieeexplore.ieee.org/xpl/conhome/9501/proceeding (Conference proceeding)

Publication series

NameProceedings of the IEEE International Conference on VLSI Design
PublisherIEEE
ISSN (Print)1063-9667
ISSN (Electronic)2380-6923

Conference

Conference18th International Conference on VLSI Design: Power Aware Design of VLSI Systems
Country/TerritoryIndia
CityKolkata
Period3/01/057/01/05
Internet address

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