Compacted channel routing with via placement restrictions

D. F. Wong*, C. L. Liu

*Corresponding author for this work

Research output: Contribution to journalJournal articlepeer-review

13 Citations (Scopus)


We study in this paper the channel routing problem when there are restrictions on the placement of via holes. We show how to produce routing solutions that contain no horizontally adjacent vias and a close to minimum number of vertically and diagonally adjacent vias. Such solutions lead to compaction that will reduce total routing area.

Original languageEnglish
Pages (from-to)287-307
Number of pages21
JournalIntegration, the VLSI Journal
Issue number4
Publication statusPublished - Dec 1986

Scopus Subject Areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

User-Defined Keywords

  • Channel routing
  • compaction
  • vias


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