CMP aware shuttle mask floorplanning

Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wong

Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

13 Citations (Scopus)


By putting different chips on the same mask, shuttle mask (or multiple project wafer) provides an economical solution for low volume designs and design prototypes to share the rising mask cost. A challenging floorplanning problem is to optimally pack these chips according to objectives and constraints related to cost and manufacturability. In this paper, we study the problem of CMP aware shuttle mask floorplanning, which is formulated as a rectangle packing problem with objectives of area and post-CMP topography variation minimization. We propose a 3-step procedure to solve the problem. First, we use the low-pass filter oxide CMP model to guide the simulated annealing search to minimize the topography variation. The result is then further improved by sliding each chip in its enclosing rectangle. Finally, we calculate the optimal amount of dummy feature needed with a linear programming method. Our experiment shows excellent results on real industry data.

Original languageEnglish
Title of host publicationASP-DAC '05
Subtitle of host publicationProceedings of the 2005 Asia and South Pacific Design Automation Conference
Place of PublicationUnited States
PublisherAssociation for Computing Machinery (ACM)
Number of pages4
ISBN (Electronic)9780780387379
Publication statusPublished - Jan 2005
Event10th Asia and South Pacific Design Automation Conference, ASP-DAC 2005 - Hotel Equatorial, Shanghai, China
Duration: 18 Jan 200521 Jan 2005 (Conference website)


Conference10th Asia and South Pacific Design Automation Conference, ASP-DAC 2005
Internet address

Scopus Subject Areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering


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