Abstract
A linear-time optimal algorithm for minimizing the density of a channel (with exits) by permuting the terminals on the two sides of the channel is presented. It compares favorably with the near-optimal algorithm of J. Cong and K.-Y. Khoo (1991) that runs in superlinear time. The present algorithm has important applications in hierarchical layout design of integrated circuits. In addition, it is shown that the problem of minimizing wire length by permuting terminals is NP-hard in the strong sense.
Original language | English |
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Title of host publication | Proceedings of 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors |
Publisher | IEEE |
Pages | 378-382 |
Number of pages | 5 |
ISBN (Print) | 0818631104 |
DOIs | |
Publication status | Published - 14 Oct 1992 |
Event | 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Cambridge, MA, United States Duration: 11 Oct 1992 → 14 Oct 1992 https://ieeexplore.ieee.org/xpl/conhome/442/proceeding |
Publication series
Name | IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD |
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Conference
Conference | 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors |
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Country/Territory | United States |
City | Cambridge, MA |
Period | 11/10/92 → 14/10/92 |
Internet address |
User-Defined Keywords
- Routing
- Polynomials
- Wire
- Delta modulation
- Minimization
- Algorithm design and analysis
- Circuits
- Very large scale integration
- Scholarships