Abstract
In this paper, we present an integrated approach for floorplanning and bus planning, i.e., bus-driven floorplanning (BDF). We are given a set of circuit blocks and the bus specifications (i.e., the net list of blocks for the buses). A feasible BDF solution is a placement of all circuit blocks such that each bus can be realized as a rectangular strip (horizontal or vertical) going through all the blocks connected by the bus. The objective is to determine a feasible BDF solution that minimizes the floorplan area and the total bus area. Our approach is based upon the sequence-pair floorplan representation. After a careful analysis of the relationship between bus ordering and block ordering in the floorplan represented by a sequence pair, we derive feasibility conditions on sequence pairs that give feasible BDF solutions. Experimental results demonstrate the efficiency and effectiveness of our algorithm.
| Original language | English |
|---|---|
| Pages (from-to) | 1522-1530 |
| Number of pages | 9 |
| Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
| Volume | 23 |
| Issue number | 11 |
| DOIs | |
| Publication status | Published - Nov 2004 |
User-Defined Keywords
- Computer-aided design (CAD)
- Floorplan
- Physical design
- Sequence pair
- Very large scale integration (VLSI)
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