Abstract
In this paper, we present an integrated approach to floorplanning and bus planning, i.e., bus-driven floorplanning (BDF). We are given a set of circuit blocks and the bus specifications (i.e., the net list of blocks for the buses). A feasible BDF solution is a placement of all circuit blocks such that each bus can be realized as a rectangular strip (horizontal or vertical) going through all the blocks connected by the bus. The objective is to determine a feasible BDF solution that minimizes floorplan area and total bus area. Our approach is based upon the sequence-pair floorplan representation. After a careful analysis of the relationship between bus ordering and block ordering in the floorplan represented by a sequence pair, we derive feasibility conditions on sequence pairs that give feasible BDF solutions. Experimental results demonstrate the efficiency and effectiveness of our algorithm.
Original language | English |
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Title of host publication | Proceedings of The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2003 |
Place of Publication | United States |
Publisher | IEEE |
Pages | 66-73 |
Number of pages | 8 |
ISBN (Print) | 9781581137620 |
DOIs | |
Publication status | Published - Nov 2003 |
Event | 2003 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2003 - DoubleTree Hotel, San Jose, United States Duration: 9 Nov 2003 → 13 Nov 2003 https://ieeexplore.ieee.org/xpl/conhome/8895/proceeding (Conference proceedings) |
Publication series
Name | Proceedings of the IEEE/ACM international conference on Computer-aided design, ICCAD |
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Publisher | IEEE |
ISSN (Print) | 1092-3152 |
Conference
Conference | 2003 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2003 |
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Country/Territory | United States |
City | San Jose |
Period | 9/11/03 → 13/11/03 |
Internet address |
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