Area optimization for general floorplans: An analogy to resistive networks

Khe Sing The; D. F. Wong

doi:10.1109/ISCAS.1991.176808

Area optimization for general floorplans: An analogy to resistive networks

Khe Sing The^*, D. F. Wong

^*Corresponding author for this work

Office of the Provost

Research output: Chapter in book/report/conference proceeding › Conference proceeding › peer-review

Abstract

The authors present an algorithm for general floorplans in which each module has an infinite set of possible dimensions. Given the topology of a floorplan and the possible dimensions of the modules, the floorplan area optimization problem is to determine the dimensions of all the modules in order to minimize the floorplan area. The optimization algorithm is based on an analogy between reducing floorplan area and solving resistive network equations. Experimental results show that the algorithm outperforms the one proposed by D. F. Wong and P. Sakhamuri (1989).

Original language	English
Title of host publication	Proceedings - IEEE International Symposium on Circuits and Systems 1991
Publisher	IEEE
Pages	2056-2059
Number of pages	4
ISBN (Print)	0780300505
DOIs	https://doi.org/10.1109/ISCAS.1991.176808
Publication status	Published - Jun 1991
Event	1991 IEEE International Symposium on Circuits and Systems, ISCAS 1991 - , Singapore Duration: 11 Jun 1991 → 14 Jun 1991 https://ieeexplore.ieee.org/xpl/conhome/555/proceeding

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Publisher	IEEE
ISSN (Print)	0271-4310

Conference

Conference	1991 IEEE International Symposium on Circuits and Systems, ISCAS 1991
Country/Territory	Singapore
Period	11/06/91 → 14/06/91
Internet address	https://ieeexplore.ieee.org/xpl/conhome/555/proceeding

Scopus Subject Areas

Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.1991.176808

Cite this

@inproceedings{4f29dc672ebf48f781411e177a67c844,

title = "Area optimization for general floorplans: An analogy to resistive networks",

abstract = "The authors present an algorithm for general floorplans in which each module has an infinite set of possible dimensions. Given the topology of a floorplan and the possible dimensions of the modules, the floorplan area optimization problem is to determine the dimensions of all the modules in order to minimize the floorplan area. The optimization algorithm is based on an analogy between reducing floorplan area and solving resistive network equations. Experimental results show that the algorithm outperforms the one proposed by D. F. Wong and P. Sakhamuri (1989).",

author = "The, {Khe Sing} and Wong, {D. F.}",

year = "1991",

month = jun,

doi = "10.1109/ISCAS.1991.176808",

language = "English",

isbn = "0780300505",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "IEEE",

pages = "2056--2059",

booktitle = "Proceedings - IEEE International Symposium on Circuits and Systems 1991",

address = "United States",

note = "1991 IEEE International Symposium on Circuits and Systems, ISCAS 1991 ; Conference date: 11-06-1991 Through 14-06-1991",

url = "https://ieeexplore.ieee.org/xpl/conhome/555/proceeding",

}

The, KS & Wong, DF 1991, Area optimization for general floorplans: An analogy to resistive networks. in Proceedings - IEEE International Symposium on Circuits and Systems 1991. Proceedings - IEEE International Symposium on Circuits and Systems, IEEE, pp. 2056-2059, 1991 IEEE International Symposium on Circuits and Systems, ISCAS 1991, Singapore, 11/06/91. https://doi.org/10.1109/ISCAS.1991.176808

Area optimization for general floorplans: An analogy to resistive networks. / The, Khe Sing; Wong, D. F.
Proceedings - IEEE International Symposium on Circuits and Systems 1991. IEEE, 1991. p. 2056-2059 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in book/report/conference proceeding › Conference proceeding › peer-review

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N2 - The authors present an algorithm for general floorplans in which each module has an infinite set of possible dimensions. Given the topology of a floorplan and the possible dimensions of the modules, the floorplan area optimization problem is to determine the dimensions of all the modules in order to minimize the floorplan area. The optimization algorithm is based on an analogy between reducing floorplan area and solving resistive network equations. Experimental results show that the algorithm outperforms the one proposed by D. F. Wong and P. Sakhamuri (1989).

AB - The authors present an algorithm for general floorplans in which each module has an infinite set of possible dimensions. Given the topology of a floorplan and the possible dimensions of the modules, the floorplan area optimization problem is to determine the dimensions of all the modules in order to minimize the floorplan area. The optimization algorithm is based on an analogy between reducing floorplan area and solving resistive network equations. Experimental results show that the algorithm outperforms the one proposed by D. F. Wong and P. Sakhamuri (1989).

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BT - Proceedings - IEEE International Symposium on Circuits and Systems 1991

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ER -

Area optimization for general floorplans: An analogy to resistive networks

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