An ECO algorithm for resolving OPC and coupling capacitance violations

Hua Xiang, Li Da Huang, Kai Yuan Chao, Martin D. F. Wong

Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

3 Citations (Scopus)


In the deep submicron manufacturing (DSM) era, lithography/yield and noise are critical issues to be considered. Optical proximity correction (OPC) is becoming a key compensate technique for the light diffraction effect in lithography. Both OPC effect and the capacitive coupling on some wire segments can only be analyzed post routing in late design stage or post-silicon stepping design change. ECO (engineering change orders) is used in late design stage to fix violations that exceed the given OPC and coupling capacitance thresholds derived from analysis. These violations must be corrected in order to guarantee performance and yield. In this paper, we propose the first ECO routing algorithm which eliminates both OPC and coupling capacitance violations for wires. At the same time, the ECO routing obeys the given constraints so as to keep the new routing solution close to the existing one to preserve design timing and layout convergence
Original languageEnglish
Title of host publication2005 6th International Conference on ASIC Proceedings, ASICON 2005
EditorsTing Ao Tang, Yumei Huang
Place of PublicationChina
Number of pages4
Publication statusPublished - Oct 2005
Event2005 6th International Conference on ASIC, ASICON 2005 - Shanghai, China
Duration: 24 Oct 200527 Oct 2005 (Link to conference proceedings)

Publication series

NameInternational Conference on ASIC Proceeding
ISSN (Print)2162-7541
ISSN (Electronic)2162-755X


Conference2005 6th International Conference on ASIC, ASICON 2005
Internet address


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