TY - JOUR
T1 - Algorithms for simultaneous escape routing and layer assignment of dense PCBs
AU - Ozdal, M. M.
AU - Wong, M. D. F.
N1 - Funding Information:
Manuscript received June 30, 2004; revised February 5, 2005. The preliminary version of this paper was presented in IEEE/ACM International Conference on Computer Aided Design (ICCAD) in November 2004. This work was supported in part by the National Science Foundation under Grants CCR-0244236 and CCR-0306244, and in part by an IBM Faculty Partnership Award. This paper was recommended by Associate Editor T. Yoshimura. M. M. Ozdal is with the Intel Corporation, Hillsboro, OR 97124 USA.
PY - 2006/8
Y1 - 2006/8
N2 - As die sizes are shrinking, and circuit complexities are increasing, the printed circuit board routing problem becomes more and more challenging. Traditional routing algorithms cannot handle these challenges effectively, and many high-end designs in the industry require manual routing efforts. This paper proposes a problem decomposition that distinguishes routing under dense components from routing in the intermediate area. In particular, it proposes an effective methodology to find the escape routing solution for multiple components simultaneously such that the number of crossings in the intermediate area is minimized. For this, the problem is modeled as a longest path with forbidden pairs problem, and two algorithms are proposed for it. The first is an exact polynomial-time algorithm that is guaranteed to find the maximal planar routing solution on one layer. The second is a randomized algorithm that has good scalability characteristics for large circuits. Then, these algorithms are used to assign the maximal subset of planar nets to each layer, and then the remaining nets are distributed at the end. This paper demonstrates the effectiveness of these algorithms through experiments on industrial circuits.
AB - As die sizes are shrinking, and circuit complexities are increasing, the printed circuit board routing problem becomes more and more challenging. Traditional routing algorithms cannot handle these challenges effectively, and many high-end designs in the industry require manual routing efforts. This paper proposes a problem decomposition that distinguishes routing under dense components from routing in the intermediate area. In particular, it proposes an effective methodology to find the escape routing solution for multiple components simultaneously such that the number of crossings in the intermediate area is minimized. For this, the problem is modeled as a longest path with forbidden pairs problem, and two algorithms are proposed for it. The first is an exact polynomial-time algorithm that is guaranteed to find the maximal planar routing solution on one layer. The second is a randomized algorithm that has good scalability characteristics for large circuits. Then, these algorithms are used to assign the maximal subset of planar nets to each layer, and then the remaining nets are distributed at the end. This paper demonstrates the effectiveness of these algorithms through experiments on industrial circuits.
KW - Algorithms
KW - Escape routing
KW - Layer assignment
KW - Longest path with forbidden pairs
KW - Printed circuit board
UR - http://www.scopus.com/inward/record.url?scp=33746594636&partnerID=8YFLogxK
U2 - 10.1109/TCAD.2005.857376
DO - 10.1109/TCAD.2005.857376
M3 - Journal article
AN - SCOPUS:33746594636
SN - 0278-0070
VL - 25
SP - 1510
EP - 1522
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IS - 8
ER -