Abstract
The increasing clock frequencies in high-end industrial circuits bring new routing challenges that can not be handled by traditional algorithms. An important design automation problem for high-speed boards today is routing nets within tight minimum and maximum length bounds. In this paper, we propose an algorithm for routing bus structures between components on two layers such that all length constraints are satisfied. This algorithm handles length extension simultaneously during the actual routing process so that maximum resource utilization is achieved during length extension. Our approach here is to process one track at a time, and choose the best subset of nets to be routed on each track. The algorithm we propose for single-track routing is guaranteed to find the optimal subset of nets together with the optimal solution with length extension on one track. The experimental comparison with a recently proposed technique shows the effectiveness of this algorithm both in terms of solution quality and run-time.
Original language | English |
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Title of host publication | Proceedings of the IEEE International Conference on Computer Design |
Subtitle of host publication | VLSI in Computers and Processors, ICCD 2004 |
Place of Publication | United States |
Publisher | IEEE |
Pages | 99-105 |
Number of pages | 7 |
ISBN (Print) | 0769522319 |
DOIs | |
Publication status | Published - 11 Oct 2004 |
Event | 22nd IEEE International Conference on Computer Design, ICCD 2004 - San Jose, United States Duration: 11 Oct 2004 → 13 Oct 2004 http://iccd.et.tudelft.nl/2004/ICCD2004MainPage.htm (Conference website) https://ieeexplore.ieee.org/xpl/conhome/9333/proceeding (Conference proceedings) |
Publication series
Name | Proceedings of IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD |
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Publisher | IEEE |
ISSN (Print) | 1063-6404 |
Conference
Conference | 22nd IEEE International Conference on Computer Design, ICCD 2004 |
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Country/Territory | United States |
City | San Jose |
Period | 11/10/04 → 13/10/04 |
Internet address |
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Scopus Subject Areas
- Hardware and Architecture
- Electrical and Electronic Engineering