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A new approach to simultaneous buffer insertion and wire sizing
Chris C. N. Chu
,
D. F. Wong
Office of the Provost
Research output
:
Chapter in book/report/conference proceeding
›
Chapter
›
peer-review
22
Citations (Scopus)
Overview
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Keyphrases
Capacitance
100%
Wire Width
100%
Buffer Insertion
100%
Wire Sizing
100%
Special Properties
50%
Discrete Choice Experiment
50%
In(III)
50%
Polynomial Time
50%
Convex Quadratic Program
50%
Wirelength
50%
Coupling Capacitance
50%
Delay Minimization
50%
Capacitive Coupling
50%
Capacitance Model
50%
Capture Area
50%
Fringe Capacitance
50%
Power Dissipation
50%
Computer Science
Wire Capacitance
100%
Buffer Insertion
100%
Efficient Algorithm
50%
Polynomial Time
50%
Energy Dissipation
50%
Coupling Capacitance
50%
Delay Minimization
50%
Special Property
50%
Table Lookup
50%
Mathematics
Quadratic Programming
100%
Polynomial Time
100%
Running Time
100%
Special Property
100%
Energy Dissipation
100%