A New Algorithm for Floorplan Design

D. F. Wong, C. L. Liu

Research output: Chapter in book/report/conference proceedingConference proceeding

388 Citations (Scopus)

Abstract

We present in this paper a new algorithm for floorplan design using the method of simulated annealing. The major contributions of the paper are: 1. A new representation of floorplans (normalized Polish expressions) which enables us to carry out the neighborhood search effectively. 2. A simultaneous minimization of area and total interconnection length in the final solution. Experimental results indicate that the algorithm performs well in many test problems.
Original languageEnglish
Title of host publication23rd ACM/IEEE Design Automation Conference - Proceedings 1986
PublisherIEEE
Pages101-107
Number of pages7
ISBN (Print)0818607025, 9780818607028
DOIs
Publication statusPublished - 2 Jul 1986
Event23rd ACM/IEEE Design Automation Conference, DAC 1986 - Las Vegas, NV, United States
Duration: 29 Jun 19862 Jul 1986
https://ieeexplore.ieee.org/xpl/conhome/10572/proceeding
https://dl.acm.org/doi/proceedings/10.5555/318013

Publication series

NameACM/IEEE Design Automation Conference - Proceedings
ISSN (Print)0738-100X

Conference

Conference23rd ACM/IEEE Design Automation Conference, DAC 1986
Country/TerritoryUnited States
CityLas Vegas, NV
Period29/06/862/07/86
Internet address

User-Defined Keywords

  • Algorithm design and analysis
  • Shape
  • Simulated annealing
  • Computer science
  • Design methodology
  • Computational modeling
  • Computer simulation
  • Minimization
  • Integrated circuit interconnections
  • Performance evaluation

Fingerprint

Dive into the research topics of 'A New Algorithm for Floorplan Design'. Together they form a unique fingerprint.

Cite this