A fast and accurate technique to optimize characterization tables for logic synthesis

John F. Croix, D. F. Wong

Research output: Chapter in book/report/conference proceedingChapterpeer-review

16 Citations (Scopus)


Cell characterization data is used by synthesis and timing verification tools to compile and validate a cell netlist which meets timing constraints imposed by the designer. Characterization tables contain data for multiple, simple equations representing a cell's behavior and are an alternative to the single, monolithic characteristic equation. Data in the table is fit to a function whose form is fixed by the application, and the cell's response is interpolated from the function. Tables can potentially increase accuracy, but large tables can cause a program to use dramatically more memory and run much slower. The optimization of characterization tables, in which accuracy is maintained but table size is significantly reduced, is important if large programs, such as synthesis, are to complete accurately and in a reasonable runtime. In this paper we address some of the issues involved in characterizing cells and optimizing characterization tables quickly and accurately. Experimental results from the use of these techniques within AMD for a Synopsys cell library is also presented.

Original languageEnglish
Title of host publication34th ACM/IEEE Design Automation Conference - Proceedings 1997
PublisherAssociation for Computing Machinery (ACM)
Number of pages4
ISBN (Print)9780897919203, 0780340930
Publication statusPublished - Jun 1997
Event34th ACM/IEEE Design Automation Conference, DAC 1997 - Anaheim , United States
Duration: 9 Jun 199713 Jun 1997
https://dl.acm.org/doi/proceedings/10.1145/266021 (Link to conference proceedings)

Publication series

NameACM/IEEE Design Automation Conference - Proceedings
ISSN (Print)0738-100X


Conference34th ACM/IEEE Design Automation Conference, DAC 1997
Country/TerritoryUnited States
Internet address

Scopus Subject Areas

  • Hardware and Architecture
  • Control and Systems Engineering


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