A fast and accurate method for interconnect current calculation

Muzhou Shao; D. F. Wong; Youxin Gao; Huijing Cao; Li Pen Yuan

doi:10.1145/1119772.1119780

A fast and accurate method for interconnect current calculation

Muzhou Shao, D. F. Wong, Youxin Gao, Huijing Cao, Li Pen Yuan

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Research output: Chapter in book/report/conference proceeding › Conference proceeding › peer-review

8 Citations (Scopus)

Abstract

As VLSI technology continues to scale down, electromigration problem has become one of the dominant factors in determining system reliability. This problem is caused by high current density flowing in the metal interconnect. Therefore, current evaluation is a crucial concern in IC design. SPICE level circuit simulators are excellent for doing current calculation, however, their running time are too expensive to be used repeatedly in design synthesis loops. In this paper, we propose an efficient approach for the interconnect current calculation. This method is based on moment matching but does not need high order moments. It only needs traversing the RC tree once to get the mean current value of every segment, traversing the tree once more is enough for the RMS current calculation, and two more traversals is sufficient for the peak current calculation. We apply our method to a larger number of interconnects getting close-to-SPICE accuracy at significantly faster runtimes. In particular, applying the method to 17,387 wire segments in the clock tree of a commercial IC, we obtained that the average deviation error of mean current is 0.0569%, average RMS current error is 0.703% and average peak current error is 6.552%. It took 28 hours for HSPICE to get current value of all the wire segments and it only took our method 156 seconds.

Original language	English
Title of host publication	ASP-DAC '03
Subtitle of host publication	Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Place of Publication	United States
Publisher	Association for Computing Machinery (ACM)
Pages	37-42
Number of pages	6
ISBN (Print)	9780780376601
DOIs	https://doi.org/10.1145/1119772.1119780
Publication status	Published - Jan 2003
Event	8th Asia and South Pacific Design Automation Conference, ASP-DAC 2003 - Kitakyushu, Japan Duration: 21 Jan 2003 → 24 Jan 2003 https://www.aspdac.com/2003/ (Conference website) https://dl.acm.org/doi/proceedings/10.1145/1119772 (Conference proceedings)

Publication series

Name	Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC
ISSN (Print)	2153-6961
ISSN (Electronic)	2153-697X

Conference

Conference	8th Asia and South Pacific Design Automation Conference, ASP-DAC 2003
Country/Territory	Japan
City	Kitakyushu
Period	21/01/03 → 24/01/03
Internet address	https://www.aspdac.com/2003/ (Conference website) https://dl.acm.org/doi/proceedings/10.1145/1119772 (Conference proceedings)

Access to Document

10.1145/1119772.1119780

Cite this

Shao, M., Wong, D. F., Gao, Y., Cao, H., & Yuan, L. P. (2003). A fast and accurate method for interconnect current calculation. In ASP-DAC '03: Proceedings of the 2003 Asia and South Pacific Design Automation Conference (pp. 37-42). (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC). Association for Computing Machinery (ACM). https://doi.org/10.1145/1119772.1119780

@inproceedings{029faf77a1bd474aaaef3d9d3b735a39,

title = "A fast and accurate method for interconnect current calculation",

abstract = "As VLSI technology continues to scale down, electromigration problem has become one of the dominant factors in determining system reliability. This problem is caused by high current density flowing in the metal interconnect. Therefore, current evaluation is a crucial concern in IC design. SPICE level circuit simulators are excellent for doing current calculation, however, their running time are too expensive to be used repeatedly in design synthesis loops. In this paper, we propose an efficient approach for the interconnect current calculation. This method is based on moment matching but does not need high order moments. It only needs traversing the RC tree once to get the mean current value of every segment, traversing the tree once more is enough for the RMS current calculation, and two more traversals is sufficient for the peak current calculation. We apply our method to a larger number of interconnects getting close-to-SPICE accuracy at significantly faster runtimes. In particular, applying the method to 17,387 wire segments in the clock tree of a commercial IC, we obtained that the average deviation error of mean current is 0.0569%, average RMS current error is 0.703% and average peak current error is 6.552%. It took 28 hours for HSPICE to get current value of all the wire segments and it only took our method 156 seconds.",

author = "Muzhou Shao and Wong, {D. F.} and Youxin Gao and Huijing Cao and Yuan, {Li Pen}",

note = "Funding information: This work was partially supported by the National Science Foundation under grant CCR-0244236. Publisher copyright: {\textcopyright} 2003 ACM; 8th Asia and South Pacific Design Automation Conference, ASP-DAC 2003 ; Conference date: 21-01-2003 Through 24-01-2003",

year = "2003",

month = jan,

doi = "10.1145/1119772.1119780",

language = "English",

isbn = "9780780376601",

series = "Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC",

publisher = "Association for Computing Machinery (ACM)",

pages = "37--42",

booktitle = "ASP-DAC '03",

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Shao, M, Wong, DF, Gao, Y, Cao, H & Yuan, LP 2003, A fast and accurate method for interconnect current calculation. in ASP-DAC '03: Proceedings of the 2003 Asia and South Pacific Design Automation Conference. Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC, Association for Computing Machinery (ACM), United States, pp. 37-42, 8th Asia and South Pacific Design Automation Conference, ASP-DAC 2003, Kitakyushu, Japan, 21/01/03. https://doi.org/10.1145/1119772.1119780

A fast and accurate method for interconnect current calculation. / Shao, Muzhou; Wong, D. F.; Gao, Youxin et al.
ASP-DAC '03: Proceedings of the 2003 Asia and South Pacific Design Automation Conference. United States: Association for Computing Machinery (ACM), 2003. p. 37-42 (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in book/report/conference proceeding › Conference proceeding › peer-review

TY - GEN

T1 - A fast and accurate method for interconnect current calculation

AU - Shao, Muzhou

AU - Wong, D. F.

AU - Gao, Youxin

AU - Cao, Huijing

AU - Yuan, Li Pen

PY - 2003/1

Y1 - 2003/1

N2 - As VLSI technology continues to scale down, electromigration problem has become one of the dominant factors in determining system reliability. This problem is caused by high current density flowing in the metal interconnect. Therefore, current evaluation is a crucial concern in IC design. SPICE level circuit simulators are excellent for doing current calculation, however, their running time are too expensive to be used repeatedly in design synthesis loops. In this paper, we propose an efficient approach for the interconnect current calculation. This method is based on moment matching but does not need high order moments. It only needs traversing the RC tree once to get the mean current value of every segment, traversing the tree once more is enough for the RMS current calculation, and two more traversals is sufficient for the peak current calculation. We apply our method to a larger number of interconnects getting close-to-SPICE accuracy at significantly faster runtimes. In particular, applying the method to 17,387 wire segments in the clock tree of a commercial IC, we obtained that the average deviation error of mean current is 0.0569%, average RMS current error is 0.703% and average peak current error is 6.552%. It took 28 hours for HSPICE to get current value of all the wire segments and it only took our method 156 seconds.

AB - As VLSI technology continues to scale down, electromigration problem has become one of the dominant factors in determining system reliability. This problem is caused by high current density flowing in the metal interconnect. Therefore, current evaluation is a crucial concern in IC design. SPICE level circuit simulators are excellent for doing current calculation, however, their running time are too expensive to be used repeatedly in design synthesis loops. In this paper, we propose an efficient approach for the interconnect current calculation. This method is based on moment matching but does not need high order moments. It only needs traversing the RC tree once to get the mean current value of every segment, traversing the tree once more is enough for the RMS current calculation, and two more traversals is sufficient for the peak current calculation. We apply our method to a larger number of interconnects getting close-to-SPICE accuracy at significantly faster runtimes. In particular, applying the method to 17,387 wire segments in the clock tree of a commercial IC, we obtained that the average deviation error of mean current is 0.0569%, average RMS current error is 0.703% and average peak current error is 6.552%. It took 28 hours for HSPICE to get current value of all the wire segments and it only took our method 156 seconds.

U2 - 10.1145/1119772.1119780

DO - 10.1145/1119772.1119780

M3 - Conference proceeding

SN - 9780780376601

T3 - Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC

SP - 37

EP - 42

BT - ASP-DAC '03

PB - Association for Computing Machinery (ACM)

CY - United States

T2 - 8th Asia and South Pacific Design Automation Conference, ASP-DAC 2003

Y2 - 21 January 2003 through 24 January 2003

ER -

Shao M, Wong DF, Gao Y, Cao H, Yuan LP. A fast and accurate method for interconnect current calculation. In ASP-DAC '03: Proceedings of the 2003 Asia and South Pacific Design Automation Conference. United States: Association for Computing Machinery (ACM). 2003. p. 37-42. (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC). doi: 10.1145/1119772.1119780

A fast and accurate method for interconnect current calculation

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