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  • 1998

    Slicing floorplans with pre-placed modules

    Young, F. Y. & Wong, D. F., 8 Nov 1998, ICCAD '98: Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design. Association for Computing Machinery (ACM), p. 252-258 7 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    34 Citations (Scopus)
  • Timing-driven routing for symmetrical-array-based FPGAs

    Zhu, K., Chang, Y-W. & Wong, D. F., 5 Oct 1998, Proceedings of The 16th IEEE International Conference on Computer Design, ICCD 1998. IEEE, p. 628-633 6 p. (Proceedings - IEEE International Conference on Computer Design (ICCD): VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    11 Citations (Scopus)
  • Using PLAs to design universal logic modules in FPGAs

    Lee, K. K. & Wong, D. F., May 1998, Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 1998. IEEE, Vol. 6. p. 421-425 5 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    1 Citation (Scopus)
  • 1997

    A graph-theoretic sufficient condition for FPGA/FPIC switch-module routability

    Chang, Y. W., Wong, D. F. & Wong, C. K., Jun 1997, Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 1997. IEEE, p. 1572-1575 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • A matrix synthesis approach to thermal placement

    Chu, C. C. N. & Wong, D. F., 14 Apr 1997, ISPD '97: Proceedings of the 1997 International Symposium on Physical Design. Association for Computing Machinery (ACM), p. 163-168 6 p. (Proceedings of the International Symposium on Physical Design, ISPD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    42 Citations (Scopus)
  • A new channel pin assignment algorithm and its application to over-the-cell routing

    Wang, T. C., Wong, D. F. & Wong, C. K., Jun 1997, Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 1997. IEEE, p. 1560-1563 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • Closed form solution to simultaneous buffer insertion/sizing and wire sizing

    Chu, C. C. N. & Wong, D. F., Apr 1997, ISPD '97: Proceedings of the 1997 International Symposium on Physical Design. Association for Computing Machinery (ACM), p. 192-197 6 p. (Proceedings of the International Symposium on Physical Design, ISPD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    52 Citations (Scopus)
  • 1996

    An algorithm for zero-skew clock tree routing with buffer insertion

    Chen, Y. P. & Wong, D. F., Mar 1996, 1996 ED&TC European Design and Test Conference. IEEE, p. 230-236 7 p. 494154. (Proceedings of 1996 European Conference on Design and Test, EDTC 1996).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    5 Citations (Scopus)
  • Fast algorithm for optimal wire-sizing under Elmore delay model

    Chen, C. P. & Wong, D. F., May 1996, Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 1996. IEEE, p. 412-415 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    21 Citations (Scopus)
  • On a new timing-driven routing tree problem

    Chang, Y. W., Wong, D. F., Zhu, K. & Wong, C. K., May 1996, Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 1996. IEEE, p. 420-423 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    2 Citations (Scopus)
  • Universal logic modules for series-parallel functions

    Thakur, S. & Wong, D. F., Feb 1996, 1996 ACM 4th International Symposium on Field-Programmable Gate Arrays, FPGA 1996. IEEE, p. 31-37 7 p. 1377283. (Proceedings of the 1996 ACM 4th International Symposium on Field-Programmable Gate Arrays, FPGA 1996).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
  • Universal switch-module design for symmetric-array-based FPGAS

    Chang, Y-W., Wong, D. F. & Wong, C. K., Feb 1996, 1996 ACM 4th International Symposium on Field-Programmable Gate Arrays, FPGA 1996. Association for Computing Machinery (ACM), p. 80-87 8 p. 1377290. (Proceedings of ACM 4th International Symposium on Field-Programmable Gate Arrays, FPGA).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
  • 1995

    Circuit clustering for delay minimization under area and pin constraints

    Yang, H. & Wong, D. F., Mar 1995, 1995 European Conference on Design and Test, EDTC 1995. IEEE, p. 65-70 6 p. (Proceedings of 1995 European Conference on Design and Test, EDTC 1995).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    12 Citations (Scopus)
  • 1994

    Algorithms for a switch module routing problem

    Thakur, S., Wong, D. F. & Muthukrishnan, S., Sept 1994, EURO-DAC '94: Proceedings of the Conference on European Design Automation. Association for Computing Machinery (ACM), p. 265-270 6 p. (Proceedings of the Conference on European Design Automation).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    1 Citation (Scopus)
  • 1993

    A graph partitioning problem for multiple-chip design

    Chen, Y-P., Wang, T-C. & Wong, D. F., 6 May 1993, 1993 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, p. 1778-1781 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems (ISCAS); vol. 4).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    3 Citations (Scopus)
  • Cell area minimization by transistor folding

    Her, T. W. & Wong, D. F., 24 Sept 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference. IEEE, p. 172-177 6 p. (European Design Automation Conference).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    5 Citations (Scopus)
  • Fast Boolean matching for field-programmable gate arrays

    Zhu, K. & Wong, D. F., 24 Sept 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference. IEEE, p. 352-357 6 p. (European Design Automation Conference).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    8 Citations (Scopus)
  • HV/VH Trees: A New Spatial Data Structure for Fast Region Queries

    Lai, G. G., Fussell, D. & Wong, D. F., Jul 1993, 30th ACM/IEEE Design Automation Conference - Proceedings 1993. Association for Computing Machinery (ACM), p. 43-47 5 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    Open Access
    8 Citations (Scopus)
  • On optimal approximation of orthogonal polygons

    Chen, Y. P. & Wong, D. F., 6 May 1993, 1993 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, p. 2533-2536 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems (ISCAS); vol. 4).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • On over-the-cell channel routing

    Wang, T. C., Wong, D. F., Sun, Y. & Wong, C. K., 24 Sept 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference. IEEE, p. 110-115 6 p. (European Design Automation Conference).

    Research output: Chapter in book/report/conference proceedingConference proceeding

  • Optimal clustering for delay minimization

    Rajaraman, R. & Wong, D. F., Jul 1993, 30th ACM/IEEE Design Automation Conference - Proceedings 1993. Association for Computing Machinery (ACM), p. 309-314 6 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    37 Citations (Scopus)
  • Switch module design with application to two-dimensional segmentation design

    Zhu, K., Wong, D. F. & Chang, Y. W., 11 Nov 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD). IEEE, p. 480-485 6 p. (IEEE International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    15 Citations (Scopus)
  • 1992

    A graph theoretic technique to speed up floorplan area optimization

    Wang, T. C. & Wong, D. F., 12 Jun 1992, 29th ACM/IEEE Design Automation Conference - Proceedings 1992. IEEE, p. 62-68 7 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    9 Citations (Scopus)
  • Channel density minimization by pin permutation

    Cai, Y. & Wong, D. F., 14 Oct 1992, Proceedings of 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors. IEEE, p. 378-382 5 p. (IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD).

    Research output: Chapter in book/report/conference proceedingConference proceeding

  • On channel segmentation design for row-based FPGAs

    Zhu, K. & Wong, D. F., Nov 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design. IEEE, p. 26-29 4 p. (IEEE/ACM International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    21 Citations (Scopus)
  • 1991

    A channel/switchbox definition algorithm for building-block layout

    Cai, Y. & Wong, D. F., Jan 1991, 27th ACM/IEEE Design Automation Conference - Proceedings 1990. Association for Computing Machinery (ACM), p. 638-641 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    5 Citations (Scopus)
  • A fast algorithm for optimal via-shifting in channel compaction

    Cai, Y. & Wong, D. F., Jun 1991, Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 1991. IEEE, p. 1940-1943 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    1 Citation (Scopus)
  • A general multi-layer area router

    Guruswamy, M. & Wong, D. F., Jun 1991, 28th ACM/IEEE Design Automation Conference - Proceedings 1991. Association for Computing Machinery (ACM), p. 335-340 6 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    4 Citations (Scopus)
  • An optimal algorithm for floorplan area optimization

    Wang, T. C. & Wong, D. F., Jan 1991, 27th ACM/IEEE Design Automation Conference - Proceedings 1990. Association for Computing Machinery (ACM), p. 180-186 7 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    49 Citations (Scopus)
  • Area optimization for general floorplans: An analogy to resistive networks

    The, K. S. & Wong, D. F., Jun 1991, Proceedings - IEEE International Symposium on Circuits and Systems 1991. IEEE, p. 2056-2059 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • Area optimization for higher order hierarchical floorplans

    The, K-S. & Wong, D. F., 16 Oct 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors. IEEE, p. 520-523 4 p. (IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    4 Citations (Scopus)
  • Efficient shape curve construction in floorplan design

    Wang, T. C. & Wong, D. F., 28 Feb 1991, Proceedings of the European Conference on Design Automation. IEEE, p. 356-360 5 p. (Proceedings of European Conference on Design Automation).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • Minimizing channel density by shifting blocks and terminals

    Cai, Y. & Wong, D. F., 14 Nov 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers. IEEE, p. 524-527 4 p. (IEEE International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceeding

  • On minimizing the number of L-shaped channels

    Cai, Y. & Wong, D. F., Jun 1991, 28th ACM/IEEE Design Automation Conference - Proceedings 1991. Association for Computing Machinery (ACM), p. 328-334 7 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    2 Citations (Scopus)
  • On the manifestation of faults to errors in signature analysis

    Chan, J. C., Womack, B. F. & Wong, D. F., 16 Oct 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors. IEEE, p. 360-363 4 p. (IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD).

    Research output: Chapter in book/report/conference proceedingConference proceeding

  • Optimal module implementation and its application to transistor placement

    Her, T. W. & Wong, D. F., 14 Nov 1991, 1991 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. IEEE, p. 98-101 4 p. (IEEE International Conference on Computer-Aided Design, ICCAD).

    Research output: Chapter in book/report/conference proceedingConference proceeding

  • 1990

    An optimal channel pin assignment algorithm

    Cai, Y. & Wong, D. F., 15 Nov 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. IEEE, p. 10-13 4 p. (IEEE International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    3 Citations (Scopus)
  • Optimal orientations of transistor chains

    Her, T. W., Wong, D. F. & Freeman, T. H., 15 Nov 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. IEEE, p. 524-527 4 p. (IEEE International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    3 Citations (Scopus)
  • Optimal via-shifting in channel compaction

    Cai, Y. & Wong, D. F., Mar 1990, Proceedings of the European Design Automation Conference, EDAC 1990. IEEE, p. 186-190 5 p. (Proceedings of the European Design Automation Conference, EDAC).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    3 Citations (Scopus)
  • Topological routing using geometric information

    Haruyama, S., Wong, D. F. & Fussell, D., 15 Nov 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. IEEE, p. 6-9 4 p. (IEEE International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    1 Citation (Scopus)
  • 1989

    An algorithm for hierarchical floorplan design

    Wong, D. F. & The, K-S., 9 Nov 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. IEEE, p. 484-487 4 p. (IEEE International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    8 Citations (Scopus)
  • Efficient floorplan area optimization

    Wong, D. F. & Sakhamuri, P. S., 1 Jun 1989, 26th ACM/IEEE Design Automation Conference - Proceedings 1989. Association for Computing Machinery (ACM), p. 586-589 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    16 Citations (Scopus)
  • Via minimization by layout modification

    The, K. S., Wong, D. F. & Cong, J., 1 Jun 1989, 26th ACM/IEEE Design Automation Conference - Proceedings 1989. Association for Computing Machinery (ACM), p. 799-802 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    13 Citations (Scopus)
  • 1988

    Channel routing order for building-block layout with rectilinear modules

    Guruswamy, M. & Wong, D. F., 10 Nov 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers. IEEE, p. 184-187 4 p. (IEEE International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    12 Citations (Scopus)
  • How to obtain more compactable channel routing solutions.

    Cong, J. & Wong, D. F., Jun 1988, 25th ACM/IEEE Design Automation Conference - Proceedings 1988. IEEE, p. 663-666 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    8 Citations (Scopus)
  • Topological channel routing

    Haruyama, S., Wong, D. F. & Fussell, D., 10 Nov 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers. IEEE, p. 406-409 4 p. (IEEE International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceeding

    4 Citations (Scopus)
  • 1987

    A New Approach to the Three Layer Channel Routing Problem

    Cong, J., Wong, D. F. & Liu, C. L., Nov 1987, IEEE International Conference on Computer-Aided Design, ICCAD 1987: Digest of Technical Papers. IEEE, p. 378-381 4 p. (IEEE International Conference on Computer-Aided Design. Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    19 Citations (Scopus)
  • Array optimization for VLSI synthesis

    Wong, D. F. & Liu, C. L., Oct 1987, 24th ACM/IEEE Design Automation Conference - Proceedings 1987. IEEE, p. 537-543 7 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
  • Enhanced bottom-up algorithm for floorplan design

    Mueller, T. R., Wong, D. F. & Liu, C. L., Nov 1987, IEEE International Conference on Computer-Aided Design, ICCAD 1987: Digest of Technical Papers. IEEE, p. 524-527 4 p. (IEEE International Conference on Computer-Aided Design. Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    4 Citations (Scopus)
  • Floorplan Design for Rectangular and L-Shaped Modules

    Wong, D. F. & Liu, C. L., Nov 1987, IEEE International Conference on Computer-Aided Design, ICCAD-87. Digest of Technical Papers. IEEE, p. 520-523 4 p. (IEEE International Conference on Computer-Aided Design. Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    15 Citations (Scopus)