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  • 2002

    Maze routing with buffer insertion under transition time constraints

    Huang, L. D., Lai, M., Wong, D. F. & Gao, Y., Mar 2002, Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, DATE 2002. Kloos, C. D. & da Franca, J. (eds.). United States: IEEE, p. 702-707 6 p. (Proceedings of Design, Automation and Test in Europe Conference and Exhibition, DATE).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    3 Citations (Scopus)
  • On mask layout partitioning for electron projection lithography

    Tian, R., Yu, R., Tang, X. & Wong, D. F., Nov 2002, Proceedings of The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2002. United States: Association for Computing Machinery (ACM), p. 514-518 5 p. (Proceedings of the IEEE/ACM international conference on Computer-aided design, ICCAD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    1 Citation (Scopus)
  • Shaping interconnect for uniform current density

    Shao, M., Wong, D. F., Gao, Y., Yuan, L. P. & Cao, H., Nov 2002, Proceedings of The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2002. United States: Association for Computing Machinery (ACM), p. 254-259 6 p. (Proceedings of the IEEE/ACM international conference on Computer-aided design, ICCAD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • The bi-weighted TSP problem for VLSI crosstalk minimization

    Wong, D. F. & Shao, M., May 2002, Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 2002. IEEE, p. III/767-III/770 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    2 Citations (Scopus)
  • Timing-driven routing for FPGAs based on Lagrangian relaxation

    Lee, S. & Wong, D. F., Apr 2002, ISPD '02: Proceedings of the 2002 international symposium on Physical design. United States: Association for Computing Machinery (ACM), p. 176-181 6 p. (Proceedings of The ACM International Symposium on Physical Design, ISPD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    7 Citations (Scopus)
  • 2001

    A fast and accurate delay estimation method for buffered interconnects

    Gao, Y. & Wong, D. F., Jan 2001, Proceedings of The 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001. United States: Association for Computing Machinery (ACM), p. 533-538 6 p. (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    7 Citations (Scopus)
  • A graph based algorithm for optimal buffer insertion under accurate delay models

    Gao, Y. & Wong, D. F., Mar 2001, Proceedings of The Design, Automation and Test in Europe Conference and Exhibition, DATE 2001. Nebel, W. & Jerraya, A. (eds.). IEEE, p. 535-539 5 p. (Proceedings of Design, Automation and Test in Europe Conference and Exhibition, DATE).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    19 Citations (Scopus)
  • An algorithm for simultaneous pin assignment and routing

    Xiang, H., Tang, X. & Wong, D. F., Nov 2001, Proceedings of The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2001. United States: IEEE, p. 232-238 7 p. (Proceedings of the IEEE/ACM international conference on Computer-aided design, ICCAD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    7 Citations (Scopus)
  • A new algorithm for routing tree construction with buffer insertion and wire sizing under obstacle constraints

    Tang, X., Tian, R., Xiang, H. & Wong, D. F., Nov 2001, Proceedings of The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2001. United States: IEEE, p. 49-56 8 p. (Proceedings of the IEEE/ACM international conference on Computer-aided design, ICCAD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    42 Citations (Scopus)
  • Dummy feature placement for chemical-mechanical polishing uniformity in a shallow trench isolation process

    Tian, R., Tang, X. & Wong, D. F., Apr 2001, ISPD '01: Proceedings of the 2001 international symposium on Physical design. Association for Computing Machinery (ACM), p. 118-123 6 p. (Proceedings of the International Symposium on Physical Design, ISPD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    12 Citations (Scopus)
  • Faster and more accurate wiring evaluation in interconnect-centric floorplanning

    Chen, H. M., Wong, D. F., Mak, W. K. & Yang, H. H., Mar 2001, GLSVLSI '01: Proceedings of the 11th Great Lakes symposium on VLSI. Association for Computing Machinery (ACM), p. 62-67 6 p. (Proceedings of the Great Lakes symposium on VLSI, GLSVLSI).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    1 Citation (Scopus)
  • FAST-SP: a fast algorithm for block placement based on sequence pair

    Tang, X. & Wong, D. F., Jan 2001, Proceedings of the 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001. United States: Association for Computing Machinery (ACM), p. 521-526 6 p. (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    150 Citations (Scopus)
  • Integrated power supply planning and floorplanning

    Liu, I. M., Chen, H. M., Chou, T. L., Aziz, A. & Wong, D. F., Jan 2001, Proceedings of The 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001. United States: Association for Computing Machinery (ACM), p. 589-594 6 p. (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    17 Citations (Scopus)
  • LRoute: a delay minimal router for hierarchical CPLDs

    Lee, K. K. & Wong, M. D. F., Feb 2001, FPGA '01: Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays. Schlag, M. & Tessier, R. (eds.). United States: Association for Computing Machinery (ACM), p. 12-20 9 p. (Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • Memory-efficient interconnect optimization

    Lai, M. & Wong, D. F., Jan 2001, Proceedings of The 6th Asia and South Pacific Design Automation Conference, ASP-DAC 2001. United States: Association for Computing Machinery (ACM), p. 198-202 5 p. (Proceedings of The Asia and South Pacific Design Automation Conference, ASP-DAC).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • Slicing tree is a complete floorplan representation

    Lai, M. & Wong, D. F., Mar 2001, Proceedings of The Design, Automation and Test in Europe Conference and Exhibition, DATE 2001. Nebel, W. & Jerraya, A. (eds.). IEEE, p. 228-232 5 p. (Proceedings of Design, Automation and Test in Europe Conference and Exhibition, DATE).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    43 Citations (Scopus)
  • 2000

    Fast evaluation of sequence pair in block placement by longest common subsequence computation

    Tang, X., Tian, R. & Wong, D. F., 27 Mar 2000, Proceedings of The Design, Automation and Test in Europe Conference and Exhibition, DATE 2000. Marwedel, P. (ed.). IEEE, p. 106-111 6 p. (Proceedings of The Design, Automation and Test in Europe Conference and Exhibition, DATE).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    72 Citations (Scopus)
  • Maze Routing with Buffer Insertion and Wiresizing

    Lai, M. & Wong, D. F., 5 Jun 2000, 37th ACM/IEEE Design Automation Conference - Proceedings 2000. Association for Computing Machinery (ACM), p. 374-378 5 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    32 Citations (Scopus)
  • Meeting delay constraints in DSM by minimal repeater insertion

    Liu, I-M., Aziz, A. & Wong, D. F., 27 Mar 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition, DATE 2000. IEEE, p. 436-440 5 p. (Proceedings Design, Automation and Test in Europe Conference and Exhibition, DATE).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    18 Citations (Scopus)
  • Model-based dummy feature placement for oxide chemical-mechanical polishing manufacturability

    Tian, R., Wong, D. F. & Boone, R., 5 Jun 2000, 37th ACM/IEEE Design Automation Conference - Proceedings 2000. Association for Computing Machinery (ACM), p. 667-670 4 p. (Proceedings - ACM/IEEE Design Automation Conference, DAC).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    45 Citations (Scopus)
  • Optimal low power XOR gate decomposition

    Zhou, H. & Wong, D. F., 5 Jun 2000, 37th ACM/IEEE Design Automation Conference - Proceedings 2000. Association for Computing Machinery (ACM), p. 104-107 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    17 Citations (Scopus)
  • Planning buffer locations by network flows

    Tang, X. & Wong, D. F., May 2000, ISPD '00: Proceedings of the 2000 International Symposium on Physical Design. Association for Computing Machinery (ACM), p. 180-185 6 p. (Proceedings of the 2000 International Symposium on Physical Design, ISPD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    49 Citations (Scopus)
  • Wire routing and satisfiability planning

    Erdem, E., Lifschitz, V. & Wong, M. D. F., 24 Jul 2000, Computational Logic - CL 2000: First International Conference London, UK, July 24–28, 2000 Proceedings. Lloyd, J., Dahl, V., Furbach, U., Kerber, M., Lau, K-K., Palamidessi, C., Pereira, L. M., Sagiv, Y. & Stuckey, P. J. (eds.). 1st ed. Berlin: Springer Verlag, p. 822-836 15 p. (Lecture Notes in Computer Science; vol. 1861)(Lecture Notes in Artificial Intelligence )(CL: International Conference on Computational Logic Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    13 Citations (Scopus)
  • Wire-sizing for delay minimization and ringing control using transmission line model

    Gao, Y. & Wong, D. F., 27 Mar 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition, DATE 2000. IEEE, p. 512-516 5 p. (Proceedings Design, Automation and Test in Europe Conference and Exhibition, DATE).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    5 Citations (Scopus)
  • Zero-skew clock tree construction by simultaneous routing, wire sizing and buffer insertion

    Liu, I-M., Chou, T-L., Aziz, A. & Wong, D. F., May 2000, ISPD '00: Proceedings of the 2000 International Symposium on Physical Design. Association for Computing Machinery (ACM), p. 33-38 6 p. (Proceedings of the International Symposium on Physical Design, ISPD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    53 Citations (Scopus)
  • 1999

    Advances in transistor timing, simulation, and optimization

    Avidan, J., Elfadel, A. & Wong, D. F., Nov 1999, Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, ICCAD 1999 . IEEE, p. 611 1 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • A fast hypergraph minimum cut algorithm

    Mak, W-K. & Wong, D. F., 30 May 1999, Proceedings of 1999 IEEE International Symposium on Circuits and Systems, ISCAS 1999. IEEE, Vol. 6. p. VI-170-VI-173 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • A graph theoretic optimal algorithm for schedule compression in time-multiplexed FPGA partitioning

    Liu, H. & Wong, D. F., 7 Nov 1999, 1999 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. IEEE, p. 400-405 6 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    9 Citations (Scopus)
  • An efficient buffer insertion algorithm for large networks based on Lagrangian relaxation

    Liu, I-M., Aziz, A., Wong, D. F. & Zhou, H., 10 Oct 1999, Proceedings of The 17th IEEE International Conference on Computer Design, ICCD 1999. IEEE, p. 210-215 6 p. (Proceedings - IEEE International Conference on Computer Design (ICCD): VLSI in Computers and Processors; vol. 1999-October).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    11 Citations (Scopus)
  • An exact tree-based structural technology mapping algorithm for configurable logic blocks in FPGAs

    Lee, K. K. & Wong, D. F., 10 Oct 1999, Proceedings of The 17th IEEE International Conference on Computer Design, ICCD 1999. IEEE, p. 216-221 6 p. (Proceedings - IEEE International Conference on Computer Design (ICCD): VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    2 Citations (Scopus)
  • Circuit partitioning for dynamically reconfigurable FPGAs

    Liu, H. & Wong, D. F., 21 Feb 1999, FPGA '99: Proceedings of the 7th ACM/SIGDA International Symposium on Field Programmable Gate Arrays. Association for Computing Machinery (ACM), p. 187-194 8 p. (Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    19 Citations (Scopus)
  • Error bounded Padé approximation via bilinear conformal transformation

    Chen, C-P. & Wong, D. F., 21 Jun 1999, 36th ACM/IEEE Design Automation Conference - Proceedings 1999. IEEE, p. 7-12 6 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    11 Citations (Scopus)
  • Integrated floorplanning and interconnect planning

    Chen, H-M., Zhou, H., Young, E. F. Y., Wong, D. F., Yang, H. H. & Sherwani, N., 7 Nov 1999, 1999 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. IEEE, p. 354-357 4 p. (IEEE International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    57 Citations (Scopus)
  • Optimal wire shape with consideration of coupling capacitance under Elmore delay model

    Gao, Y. & Wong, D. F., 18 Jan 1999, Proceedings of The 4th Asia and South Pacific Design Automation Conference, ASP-DAC 1999. IEEE, p. 217-220 4 p. (Proceedings of The Asia and South Pacific Conference on Design Automation, ASP-DAC).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • Simultaneous routing and buffer insertion with restrictions on buffer locations

    Zhou, H., Wong, D. F., Liu, I-M. & Aziz, A., 21 Jun 1999, 36th ACM/IEEE Design Automation Conference - Proceedings 1999. Association for Computing Machinery (ACM), p. 96-99 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    47 Citations (Scopus)
  • Slicing floorplans with boundary constraint

    Young, F. Y. & Wong, D. F., 18 Jan 1999, Proceedings of The 4th Asia and South Pacific Design Automation Conference, ASP-DAC 1999. IEEE, p. 17-20 4 p. (Proceedings of The Asia and South Pacific Conference on Design Automation, ASP-DAC).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • Slicing floorplans with range constraint

    Young, F. Y. & Wong, D. F., 12 Apr 1999, ISPD '99: Proceedings of the 1999 International Symposium on Physical Design. Association for Computing Machinery (ACM), p. 97-102 6 p. (Proceedings of the International Symposium on Physical Design, ISPD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    16 Citations (Scopus)
  • 1998

    A new approach to over-the-cell channel routing

    Wang, T. C., Wen, S. A., Wong, D. F. & Wong, C. K., May 1998, Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 1998. IEEE, Vol. 6. p. 248-253 6 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • A polynomial time optimal algorithm for simultaneous buffer and wire sizing

    Chu, C. C. N. & Wong, D. F., 23 Feb 1998, Proceedings of The Design, Automation and Test in Europe Conference and Exhibition, DATE 1998. IEEE, p. 479-485 7 p. (Proceedings of The Design, Automation and Test in Europe Conference and Exhibition, DATE).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    5 Citations (Scopus)
  • Circuit partitioning with complex resource constraints in FPGAs

    Liu, H., Zhu, K. & Wong, D. F., 22 Feb 1998, FPGA '98 : Proceedings of the 1998 ACM/SIGDA 6th International Symposium on Field Programmable Gate Arrays. Association for Computing Machinery (ACM), p. 77-84 8 p. (Proceedings of the International Symposium on Field Programmable Gate Arrays, FPGA).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    8 Citations (Scopus)
  • Exact tree-based FPGA technology mapping for logic blocks with independent LUTs

    Korupolu, M. R., Lee, K. K. & Wong, D. F., 15 Jun 1998, 35th ACM/IEEE Design Automation Conference - Proceedings 1998. Association for Computing Machinery (ACM), p. 708-711 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    8 Citations (Scopus)
  • Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation

    Chen, C-P., Chu, C. C. N. & Wong, D. F., 8 Nov 1998, ICCAD '98: Proceedings of the 1998 IEEE/ACM International Conference on Computer-aided Design. Association for Computing Machinery (ACM), p. 617-624 8 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    52 Citations (Scopus)
  • Global routing with crosstalk constraints

    Zhou, H. & Wong, D. F., 15 Jun 1998, 35th ACM/IEEE Design Automation Conference - Proceedings 1998. Association for Computing Machinery (ACM), p. 374-377 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    87 Citations (Scopus)
  • Graph matching-based algorithms for FPGA segmentation design

    Chang, Y-W., Lin, J-M. & Wong, D. F., 8 Nov 1998, ICCAD '98: Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design. 9781581130089: Association for Computing Machinery (ACM), p. 34-39 6 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    7 Citations (Scopus)
  • Greedy wire-sizing is linear time

    Chu, C. C. N. & Wong, D. F., 6 Apr 1998, ISPD '98: Proceedings of the 1998 International Symposium on Physical Design. Association for Computing Machinery (ACM), p. 39-44 6 p. (Proceedings of The international Symposium on Physical Design, ISPD).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    6 Citations (Scopus)
  • Integrated partitioning and scheduling for hardware/software co-design

    Liu, H. & Wong, D. F., 5 Oct 1998, Proceedings of The 16th IEEE International Conference on Computer Design, ICCD 1998. IEEE, p. 609-614 6 p. (Proceedings - IEEE International Conference on Computer Design (ICCD): VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    13 Citations (Scopus)
  • Network flow based circuit partitioning for time-multiplexed FPGAs

    Liu, H. & Wong, D. F., 8 Nov 1998, ICCAD '98: Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design. Association for Computing Machinery (ACM), p. 497-504 8 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    42 Citations (Scopus)
  • Performance-driven board-level routing for FPGA-based logic emulation

    Mak, W-K. & Wong, D. F., 5 Oct 1998, Proceedings of The 16th IEEE International Conference on Computer Design, ICCD 1998. IEEE, p. 199-201 3 p. (Proceedings - IEEE International Conference on Computer Design (ICCD): VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

  • Performance-driven board-level routing for FPGA-based logic emulation (Abstract)

    Mak, W-K. & Wong, D. F., 22 Feb 1998, FPGA '98: Proceedings of the 1998 ACM/SIGDA 6th International Symposium on Field Programmable Gate Arrays. Association for Computing Machinery (ACM), p. 199-201 3 p. (Proceedings of the International Symposium on Field Programmable Gate Arrays, FPGA).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    1 Citation (Scopus)
  • Shaping a VLSI wire to minimize delay using transmission line model

    Gao, Y. & Wong, D. F., 8 Nov 1998, ICCAD '98: Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design. Association for Computing Machinery (ACM), p. 611-616 6 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers).

    Research output: Chapter in book/report/conference proceedingConference proceedingpeer-review

    Open Access
    19 Citations (Scopus)