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  • 2022

    High-Level Synthesis for Minimizing Power Side-Channel Information Leakage

    Choden Konigsmark, S. T., Ren, W., Wong, M. D. F. & Chen, D., 8 Feb 2022, Behavioral Synthesis for Hardware Security. Katkoori, S. & Islam, S. A. (eds.). 1st ed. Cham: Springer International Publishing, p. 291-317 27 p.

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

  • 2019

    A Modern C++ Parallel Task Programming Library

    Lin, C-X., Huang, T-W., Guo, G. & Wong, M. D. F., Oct 2019, MM 2019 - Proceedings of the 27th ACM International Conference on Multimedia. Association for Computing Machinery (ACM), p. 2284–2287 4 p. (Proceedings of ACM International Conference on Multimedia).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    13 Citations (Scopus)
  • Late Breaking Results: Distributed Timing Analysis at Scale

    Huang, T-W., Lin, C-X. & Wong, M. D. F., Jun 2019, 56th ACM/IEEE Design Automation Conference - Proceedings 2019. Association for Computing Machinery (ACM), p. 1-2 2 p. 229. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
  • 2018

    A Distributed Power Grid Analysis Framework from Sequential Stream Graph

    Lin, C-X., Huang, T-W., Yu, T. & Wong, M. D. F., May 2018, GLSVLSI '18: Great Lakes Symposium on VLSI 2018. Association for Computing Machinery (ACM), p. 183–188 6 p. (Proceedings of the Great Lakes Symposium on VLSI).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    2 Citations (Scopus)
  • A General-purpose Distributed Programming System using Data-parallel Streams

    Huang, T-W., Lin, C-X., Guo, G. & Wong, M. D. F., Oct 2018, MM 2018 - Proceedings of the 2018 ACM Multimedia Conference. Association for Computing Machinery (ACM), p. 1360–1363 4 p. (Proceedings of ACM international conference on Multimedia).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    2 Citations (Scopus)
  • MtDetector: A High-performance Marine Traffic Detector at Stream Scale

    Lin, C-X., Huang, T-W., Guo, G. & Wong, M. D. F., Jun 2018, DEBS '18: The 12th ACM International Conference on Distributed and Event-based Systems. Association for Computing Machinery (ACM), p. 205–208 4 p. (Proceedings of ACM International Conference on Distributed and Event-based Systems).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    9 Citations (Scopus)
  • 2017

    LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs

    Lai, T-Y., Huang, T-W. & Wong, M. D. F., Jun 2017, 54th ACM/IEEE Design Automation Conference - Proceedings. Association for Computing Machinery (ACM), p. 1–6 6 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    9 Citations (Scopus)
  • 2016

    Early Days of Automatic Floorplan Design

    Wong, M. D. F., Apr 2016, ISPD'16: International Symposium on Physical Design. Association for Computing Machinery (ACM), (Proceedings of International Symposium on Physical Design).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

  • 2015

    Accelerated Path-Based Timing Analysis with MapReduce

    Huang, T-W. & Wong, M. D. F., Mar 2015, ISPD'15: International Symposium on Physical Design. Association for Computing Machinery (ACM), p. 103–110 8 p. (Proceedings of the Symposium on International Symposium on Physical Design).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    11 Citations (Scopus)
  • Early Days of Circuit Placement

    Wong, M. D. F., Mar 2015, ISPD'15: International Symposium on Physical Design. Association for Computing Machinery (ACM), p. 129 1 p.

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

  • Layout optimization and template pattern verification for directed self-assembly (DSA)

    Xiao, Z., Guo, D., Wong, M. D. F., Yi, H., Tung, M. C. & Wong, H-S. P., Jun 2015, 52nd ACM/IEEE Design Automation Conference 2015. Association for Computing Machinery (ACM), p. 1–6 6 p. (Proceedings of ACM/IEEE Design Automation Conference).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    5 Citations (Scopus)
  • OpenTimer: A High-Performance Timing Analysis Tool

    Huang, T-W. & Wong, M. D. F., Nov 2015, ICCAD '15: IEEE/ACM International Conference on Computer-Aided Design. IEEE, p. 895–902 7 p. (Proceedings of IEEE/ACM International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

  • 2014

    Layout Decomposition for Multiple Patterning

    Tian, H. & Wong, M. D. F., 10 Dec 2014, Encyclopedia of Algorithms. Kao, M-Y. (ed.). Living ed. Berlin, Heidelberg: Springer, p. 1–5 5 p.

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

  • System-of-PUFs: multilevel security for embedded systems

    Choden Konigsmark, S. T., Hwang, L. K., Chen, D. & Wong, M. D. F., Oct 2014, CODES '14: 2014 International Conference on Hardware/Software Codesign and System Synthesis. Association for Computing Machinery (ACM), p. 1-10 10 p. 27. (Proceedings of International Conference on Hardware/Software Codesign and System Synthesis (CODES)).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    17 Citations (Scopus)
  • 2008

    Global Routing Formulation and Maze Routing

    Ozdal, M. M. & Wong, M. D. F., 11 Nov 2008, Handbook of Algorithms for Physical Design Automation. Alpert, C. J., Mehta, D. P. & Sapatnekar, S. S. (eds.). 1st ed. Boca Raton ; London ; New York: CRC Press, p. 469-486 18 p.

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

  • Slicing Floorplans

    Wang, T-C. & Wong, M. D. F., 11 Nov 2008, Handbook of Algorithms for Physical Design Automation. Alpert, C. J., Mehta, D. P. & Sapatnekar, S. S. (eds.). 1st ed. Boca Raton ; London ; New York: CRC Press, p. 161-184 24 p.

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

  • 1997

    A fast and accurate technique to optimize characterization tables for logic synthesis

    Croix, J. F. & Wong, D. F., Jun 1997, 34th ACM/IEEE Design Automation Conference - Proceedings 1997. Association for Computing Machinery (ACM), p. 337-340 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    16 Citations (Scopus)
  • A new approach to simultaneous buffer insertion and wire sizing

    Chu, C. C. N. & Wong, D. F., Nov 1997, 1997 IEEE International Conference on Computer Aided Design, ICCAD 1997. IEEE, p. 614-621 8 p. (Proceedings of IEEE International Conference on Computer Aided Design).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    23 Citations (Scopus)
  • An exact gate decomposition algorithm for low-power technology mapping

    Zhou, H. & Wong, D. F., Nov 1997, 1997 IEEE International Conference on Computer Aided Design, ICCAD 1997. IEEE, p. 575-580 6 p. (Proceedings of IEEE International Conference on Computer Aided Design).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    7 Citations (Scopus)
  • Channel segmentation design for symmetrical FPGAs

    Mak, W-K. & Wong, D. F., Oct 1997, 1997 IEEE International Conference on Computer Design, ICCD 1997: VLSI in Computers and Processors. IEEE, p. 496-501 6 p. (Proceedings of 1997 IEEE International Conference on Computer Design, ICCD 1997: VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    7 Citations (Scopus)
  • Clustering and load balancing for buffered clock tree synthesis

    Mehta, A. D., Chen, Y-P., Menezes, N., Wong, D. F. & Pileggi, L. T., Oct 1997, 1997 IEEE International Conference on Computer Design, ICCD 1997: VLSI in Computers and Processors. IEEE, p. 217-223 7 p. (Proceedings of 1997 IEEE International Conference on Computer Design, ICCD 1997: VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    32 Citations (Scopus)
  • Crosstalk-constrained maze routing based on Lagrangian relaxation

    Zhou, H. & Wong, D. F., Oct 1997, 1997 IEEE International Conference on Computer Design, ICCD 1997: VLSI in Computers and Processors. IEEE, p. 628-633 6 p. (Proceedings of 1997 IEEE International Conference on Computer Design, ICCD 1997: VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    7 Citations (Scopus)
  • How good are slicing floorplans?

    Young, F. Y. & Wong, D. F., Apr 1997, 1997 international symposium on Physical design, ISPD '97. Association for Computing Machinery (ACM), p. 61-73 13 p. (Proceedings of 1997 international symposium on Physical design, ISPD '97).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    13 Citations (Scopus)
  • Minimum replication min-cut partitioning

    Mak, W-K. & Wong, D. F., Nov 1997, 1996 IEEE/ACM International Conference on Computer-Aided Design . IEEE, p. 1221-1227 7 p. (Proceedings of 1996 IEEE/ACM International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    8 Citations (Scopus)
  • Network flow based multi-way partitioning with area and pin constraints

    Liu, H. & Wong, D. F., Apr 1997, 1997 international symposium on Physical design, ISPD '97. Association for Computing Machinery (ACM), p. 12-17 6 p. (Proceedings of 1997 international symposium on Physical design, ISPD '97).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    1 Citation (Scopus)
  • On the construction of universal series-parallel functions for logic module design

    Young, F. Y. & Wong, D. F., Oct 1997, 1997 IEEE International Conference on Computer Design, ICCD 1997: VLSI in Computers and Processors. IEEE, p. 482-488 7 p. (Proceedings of 1997 IEEE International Conference on Computer Design, ICCD 1997: VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    1 Citation (Scopus)
  • Optimal shape function for a bi-directional wire under Elmore delay model

    Gao, Y. & Wong, D. F., Nov 1997, 1997 IEEE International Conference on Computer Aided Design, ICCAD 1997. IEEE, p. 622-627 6 p. (Proceedings of IEEE International Conference on Computer Aided Design).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    16 Citations (Scopus)
  • Optimal wire-sizing function with fringing capacitance consideration

    Chen, C-P. & Wong, D. F., Jun 1997, 34th ACM/IEEE Design Automation Conference - Proceedings 1997. Association for Computing Machinery (ACM), p. 604-607 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    38 Citations (Scopus)
  • 1996

    Delay minimal decomposition of multiplexers in technology mapping

    Thakur, S., Wong, D. F. & Krishnamoorthy, S., Jun 1996, 33rd ACM/IEEE Design Automation Conference - Proceedings 1996. Association for Computing Machinery (ACM), p. 254-257 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    13 Citations (Scopus)
  • Fast performance-driven optimization for buffered clock trees based on Lagrangian relaxation

    Chen, C-P., Chang, Y-W. & Wong, D. F., Jun 1996, 33rd ACM/IEEE Design Automation Conference - Proceedings 1996. Association for Computing Machinery (ACM), p. 405-408 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    24 Citations (Scopus)
  • Multiplexor network generation in high level synthesis

    Fang, Y-M. & Wong, D. F., Oct 1996, 1996 International Conference on Computer Design, ICCD 1996: VLSI in Computers and Processors. IEEE, p. 78-83 6 p. (Proceedings of 1996 International Conference on Computer Design, ICCD 1996: VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

  • Optimal algorithm for river routing with crosstalk constraints

    Zhou, H. & Wong, D. F., Nov 1996, 1996 IEEE/ACM International Conference on Computer-Aided Design . IEEE, p. 310-315 6 p. (Proceedings of 1996 IEEE/ACM International Conference on Computer-Aided Design).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    27 Citations (Scopus)
  • Optimal non-uniform wire-sizing under the Elmore delay model

    Chen, C-P., Zhou, H. & Wong, D. F., Nov 1996, 1996 IEEE/ACM International Conference on Computer-Aided Design . IEEE, p. 38-43 6 p. (Proceedings of 1996 IEEE/ACM International Conference on Computer-Aided Design ).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    22 Citations (Scopus)
  • Optimal wire-sizing formula under the Elmore delay model

    Chen, C-P., Chen, Y-P. & Wong, D. F., Jun 1996, 33rd ACM/IEEE Design Automation Conference - Proceedings 1996. Association for Computing Machinery (ACM), p. 487-490 4 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    61 Citations (Scopus)
  • 1995

    Board-level multi-terminal net routing for FPGA-based logic emulation

    Mak, W-K. & Wong, D. F., Aug 1995, 1995 IEEE International Conference on Computer-Aided Design, ICCAD 1995. IEEE, p. 339-344 6 p. (Proceedings of 1995 IEEE International Conference on Computer-Aided Design, ICCAD 1995).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    4 Citations (Scopus)
  • Design and analysis of FPGA/FPIC switch modules

    Chang, Y-W., Wong, D. F. & Wong, C. K., Oct 1995, 1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors. IEEE, p. 394-401 8 p. (Proceedings of 1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    5 Citations (Scopus)
  • Floorplanning for low power designs

    Chao, K-Y. & Wong, D. F., May 1995, 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995. IEEE, p. 45-48 4 p. (Proceedings of 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    9 Citations (Scopus)
  • FPGA global routing based on a new congestion metric

    Chang, Y-W., Wong, D. F. & Wong, C. K., Oct 1995, 1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors. IEEE, p. 372-378 7 p. (Proceedings of 1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    13 Citations (Scopus)
  • Graph theoretic approach to feed-through pin assignment

    Chen, Y-P. & Wong, D. F., May 1995, 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995. IEEE, p. 1687-1690 4 p. (Proceedings of 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

  • New algorithms for min-cut replication in partitioned circuits

    Yang, H. H. & Wong, D. F., Nov 1995, 1995 IEEE International Conference on Computer-Aided Design, ICCAD 1995. IEEE, p. 216-222 7 p. (Proceedings of 1995 IEEE International Conference on Computer-Aided Design, ICCAD 1995).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    16 Citations (Scopus)
  • On designing ULM-based FPGA logic modules

    Thakur, S. & Wong, D. F., Feb 1995, 1995 ACM 3rd International Symposium on Field Programmable Gate Arrays, FPGA 1995. Association for Computing Machinery (ACM), p. 3-9 7 p. (Proceedings of 1995 ACM 3rd International Symposium on Field Programmable Gate Arrays, FPGA 1995).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    22 Citations (Scopus)
  • On optimal board-level routing for FPGA-based logic emulation

    Mak, W-K. & Wong, D. F., Jan 1995, 32nd ACM/IEEE Design Automation Conference - Proceedings 1995. Association for Computing Machinery (ACM), p. 552-556 5 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    11 Citations (Scopus)
  • Optimal layer assignment algorithm for minimizing crosstalk for three layer VHV channel routing

    Thakur, S., Chao, K. Y. & Wong, D. F., May 1995, 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995. IEEE, p. 207-210 4 p. (Proceedings of 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    17 Citations (Scopus)
  • Signal integrity optimization on the pad assignment for high-speed VLSI design

    Chao, K-Y. & Wong, D. F., Nov 1995, 1995 IEEE International Conference on Computer-Aided Design, ICCAD 1995. IEEE, p. 720-725 6 p. (Proceedings of 1995 IEEE International Conference on Computer-Aided Design, ICCAD 1995).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    7 Citations (Scopus)
  • Simultaneous area and delay minimum K-LUT mapping for K-exact networks

    Thakur, S. & Wong, D. F., Oct 1995, 1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors. IEEE, p. 402-408 7 p. (Proceedings of 1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    1 Citation (Scopus)
  • Thermal placement for high-performance multichip modules

    Chao, K-Y. & Wong, D. F., Oct 1995, 1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors. IEEE, p. 218-223 6 p. (Proceedings of 1995 IEEE International Conference on Computer Design, ICCD 1995: VLSI in Computers and Processors).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    23 Citations (Scopus)
  • 1994

    A new global routing algorithm for FPGAs

    Chang, Y-W., Thakur, S., Zhu, K. & WONG, M. D. F., Nov 1994, 1994 IEEE/ACM International Conference On Computer-aided Design, ICCAD 1994. IEEE, p. 356-361 6 p. (Edit Proceedings of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    13 Citations (Scopus)
  • Clock skew minimization during FPGA placement

    Zhu, K. & Wong, D. F., Jun 1994, 31st ACM/IEEE Design Automation Conference - Proceedings 1994. Association for Computing Machinery (ACM), p. 232-237 6 p. (ACM/IEEE Design Automation Conference - Proceedings).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    Open Access
    5 Citations (Scopus)
  • Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs

    Yang, H. & Wong, D. F., Nov 1994, 1994 IEEE/ACM International Conference On Computer-aided Design, ICCAD 1994. IEEE, p. 150-155 6 p. (Proceedings of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    24 Citations (Scopus)
  • Efficient network flow based min-cut balanced partitioning

    Yang, H. & Wong, D. F., Nov 1994, 1994 IEEE/ACM International Conference On Computer-aided Design, ICCAD 1994. IEEE, p. 50-55 6 p. (IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems).

    Research output: Chapter in book/report/conference proceedingChapterpeer-review

    49 Citations (Scopus)